XC68HC705JB3 Motorola, XC68HC705JB3 Datasheet - Page 129

• Manufacturer Part Number: XC68HC705JB3
• Description: MICROCONTROLLER
• Manufacturer: Motorola

A.4
A.5
A.5.1 EPROM Program Control Register (PCR)
MC68HC05JB3
REV 1
BOOTSTRAP MODE
Bootloader mode is entered upon the rising edge of RESET if the IRQ/V
at V
ROM area from $1E00 to $1FEF. This program handles copying of user code from
an external EPROM into the on-chip EPROM. The bootload function has to be
done from an external EPROM. The bootloader performs one programming pass
at 1ms per byte then does a verify pass.
The user code must be a one-to-one correspondence with the internal EPROM
addresses.
EPROM PROGRAMMING
Programming the on-chip EPROM is achieved by using the Program Control Reg-
ister located at address $3E.
Please contact Motorola for programming board availability.
This register is provided for programming the on-chip EPROM in the
MC68HC705JB3.
MORON – Mask Option Register ON
ELAT – EPROM LATch control
PGM – EPROM ProGraM command
Bits [7:3] – Reserved
PCR
$003E
These are reserved bits and should remain zero.
TST
reset:
0 = Disable programming to Mask Option Register ($01FF)
1 = Enable programming to Mask Option Register ($01FF)
0 = EPROM address and data bus configured for normal reads
1 = EPROM address and data bus configured for programming (writes
0 = Programming power is switched OFF from EPROM array.
1 = Programming power is switched ON to EPROM array. If ELAT 1,
and the PB0 pin is at logic zero. The Bootloader program is masked in the
W
R
to EPROM cause address and data to be latched). EPROM is in
programming mode and cannot be read if ELAT is 1. This bit should
not be set when no programming voltage is applied to the V
then PGM=0.
BIT 7
R
R
0
0
= Reserved
BIT 6
R
0
0
November 5, 1998
BIT 5
R
0
0
BIT 4
R
0
0
GENERAL RELEASE SPECIFICATION
BIT 3
R
0
0
MORON
BIT 2
0
ELAT
BIT 1
0
pp
MOTOROLA
PP
pin.
BIT 0
PGM
pin is
0
A-3