COP8SG National Semiconductor, COP8SG Datasheet - Page 9

• Manufacturer Part Number: COP8SG
• Description: 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory/ Two Comparators and USART
• Manufacturer: National Semiconductor

AC Electrical Characteristics
Note 4: Maximum rate of voltage change must be
Note 5: Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, External Oscillator, inputs connected to V
but not connected to a load.
Note 6: The HALT mode will stop CKI from oscillating in the R/C and the Crystal configurations. In the R/C configuration, CKI is forced high internally. In the crystal
or external configuration, CKI is TRI-STATE. Measurement of I
grammed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to V
to HALT mode entered via setting bit 7 of the G Port data register.
Note 7: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
biased at voltages
pins will not latch up. The voltage at the pins must be limited to
ESD transients.
Note 8: National Semiconductor uses the High Temperature Storage Life (HTSL) test to evaluate the data retention capabilities of the EPROM memory cells used
in our OTP microcontrollers. Qualification devices have been stressed at 150˚C for 1000 hours. Under these conditions, our EPROM cells exhibit data retention ca-
pabilities in excess of 29 years. This is based on an activation energy of 0.7eV derated to 55˚C.
Note 9: Parameter characterized but not tested.
Note 10: Rise times faster than the minimum specification may trigger an internal power-on-reset.
Note 11: MICROWIRE Setup and Hold Times and Propagation Delays are referenced to the appropriate edge of the MICROWIRE clock. See and the MICROWIRE
operation description.
Comparators AC and DC Characteristics
Note 12: The comparator inputs are high impedance port inputs and, as such, input current is limited to port input leakage current.
Note 13: Response time is measured from a step input to a valid logic level at the comparator output. software response time is dependent of instruction execution.
Input Offset Voltage (Note 12)
Input Common Mode Voltage Range
Voltage Gain
Low Level Output Current
High Level Output Current
DC Supply Current per Comparator
(When Enabled)
Response Time (Note 13)
V
CC
= 5V, −40˚C
Parameter
>
V
CC
(the pins do not have source current when biased at a voltage below V
T
A
+85˚C.
<
0.5 V/ms.
FIGURE 4. MICROWIRE/PLUS Timing
0.4V
1.5V
V
V
200 mV step input
100 mV Overdrive,
100 pF Load
OL
OH
DD
= 0.4V
(Continued)
<
= V
Conditions
14V. WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes
HALT is done with device neither sourcing nor sinking current; with L. F, C, G0, and G2–G5 pro-
V
CC
IN
− 0.4V
V
CC
−
9
CC
−1.6
Min
0.4
1.6
). The effective resistance to V
DS101317-9
>
V
CC
Typ
100
±
and the pins will have sink current to V
5
CC
; clock monitor disabled. Parameter refers
CC
V
CC
is 750
Max
±
150
200
CC
15
− 1.5
and outputs driven low
(typical). These two
www.national.com
CC
Units
mV
mA
mA
dB
µA
when
ns
V