M306V5EESP Mitsubishi, M306V5EESP Datasheet - Page 136

• Manufacturer Part Number: M306V5EESP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
• Manufacturer: Mitsubishi

136
Fig. 2.11.45 Address data communication format
(13) Precautions when using multi-master I
Select the no-division mode and set the main clock frequency to f(X
Specify byte (.B) as data size to access multi-master I
The precautions when the read-modify-write instruction such as BSET, BCLR etc. is executed for
each register of the multi-master I
•I
•I
•I
•I
•I
•I
•I
BCLK operation mode
Used instructions
Read-modify-write instruction
2
2
2
2
2
2
2
When executing the read-modify-write instruction for this register during transfer, data may
become a value not intended.
When the read-modify-write instruction is executed for this register at detecting the STOP con-
dition, data may become a value not intended. It is because hardware changes the read/write
bit (RBW) at the above timing.
Do not execute the read-modify-write instruction for this register because all bits of this register
are changed by hardware.
When the read-modify-write instruction is executed for this register at detecting the START
condition or at completing the byte transfer, data may become a value not intended. Because
hardware changes the bit counter (BC0–BC2) at the above timing.
The read-modify-write instruction can be executed for this register.
Since the read value of high-order 4 bits is indeterminate, the read-modify-write instruction
cannot be used.
Since the value of all bits is indeterminate, the read-modify-write instruction cannot be used.
Ci data shift register (IICiS0)
Ci address register (IICiS0D)
Ci status register (IICiS1)
Ci control register (IICiS1D)
Ci clock control register (IICiS2)
Ci port selection register (IICiS2D)
Ci transmit buffer register (IICiS0S)
( 1 ) A m a s t e r - t r a n s m i t t e r t r a n s m i t s d a t a t o a s l a v e - r e c e i v e r
( 2 ) A m a s t e r - r e c e i v e r r e c e i v e s d a t a f r o m a s l a v e - t r a n s m i t t e r
( 3 ) A m a s t e r - t r a n s m i t t e r t r a n s m i t s d a t a t o a s l a v e - r e c e i v e r w i t h a 1 0 - b i t a d d r e s s
( 4 ) A m a s t e r - r e c e i v e r r e c e i v e s d a t a f r o m a s l a v e - t r a n s m i t t e r w i t h a 1 0 - b i t a d d r e s s
S : S T A R T c o n d i t i o n
A : A C K b i t
S r : R e s t a r t c o n d i t i o n
S
S
S
S
S l a v e a d d r e s s
S l a v e a d d r e s s
S l a v e a d d r e s s
1 s t 7 b i t s
S l a v e a d d r e s s
1 s t 7 b i t s
7 b i t s
7 b i t s
7 b i t s
7 b i t s
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
R / W
R / W
R / W
R / W
“ 0 ”
“ 1 ”
“ 0 ”
“ 0 ”
A
A
A
A
P : S T O P c o n d i t i o n
R / W : R e a d / W r i t e b i t
2
1 t o 8 b i t s
1 t o 8 b i t s
C-BUS interface are described below.
S l a v e a d d r e s s
2 n d b y t e
S l a v e a d d r e s s
2 n d b y t e
D a t a
D a t a
8 b i t s
8 b i t s
A
A
1 t o 8 b i t s
1 t o 8 b i t s
2
D a t a
D a t a
A
A
C-BUS interface i
1 t o 8 b i t s
D a t a
S r
A / A
A
S l a v e a d d r e s s
1 s t 7 b i t s
F r o m m a s t e r t o s l a v e
F r o m s l a v e t o m a s t e r
7 b i t s
P
P
A
2
C-BUS interface i-related registers.
1 t o 8 b i t s
D a t a
R / W
“ 1 ”
A / A
1 t o 8 b i t s
and ON-SCREEN DISPLAY CONTROLLER
D a t a
P
MITSUBISHI MICROCOMPUTERS
IN
) = 10 MHz.
A
M306V5ME-XXXSP
1 t o 8 b i t s
D a t a
A
M306V5EESP
P
______
Rev. 1.0