XR2212 Exar Corporation, XR2212 Datasheet - Page 8

• Manufacturer Part Number: XR2212
• Description: Precision Phase-Locked Loop
• Manufacturer: Exar Corporation

DESCRIPTION OF CIRCUIT CONTROLS
Signal Input (Pin 2): Signal is AC coupled to this terminal.
The internal impedance at Pin 2 is 20k . Recommended
input signal level is in the range of 10mV to 5V
peak-to-peak.
VCO Current Output (Pin 3): This is a high impedance
(M ) current output terminal which can provide +100 A
drive capability with a voltage swing equal to V
output can directly interface with CMOS or NMOS logic
families.
VCO Voltage Output (Pin 5): This terminal provides a
low- impedance (
can directly interface with low-power Schottley TTL. For
interfacing with standard TTL circuits, a 750
resistor from Pin 5 to ground is required. For operation of
the PLL without an external divider, Pin 5 can be DC
coupled to Pin 16.
Op Amp Compensation (Pin 6): The op amp section is
frequency compensated by connecting an external
capacitor from Pin 6 to the amplifier output (Pin 8). For
unity-gain
recommended.
Op Amp Inputs (Pins 7 and 9): These are the inverting
and the non-inverting inputs for the op amp section. The
common-mode range of the op amp inputs is from +1V to
(V
XR-2212
CC
Rev. 2.01
- 1.5) volts.
compensation
50 ) buffered output for the VCO. It
Figure 9. Typical Center Frequency Drift vs. Temperature
+1.0
+0.5
-0.5
-1.0
a
0
-50
20pF
R
R
R
0
R
=50K
0
0
0
=500K
=10K
=1M
-25
capacitor
pull-down
0
CC
. This
Temperature (C)
25
is
8
V
R
f
0
CC
1
=1kHz
=12R
Op Amp Output (Pin 8): The op amp output is an open-
collector type gain stage and requires a pull-up resistor,
R
recommended value of R
Phase Detector Output (Pin 10): This terminal provides
a high-impedance output for the loop phase-detector. The
PLL loop filter is formed by R
(see Figure 3 ). With no input signal, or with no
phase-error within the PLL, the DC level at Pin 10 is very
nearly equal to V
the phase detector output is equal to
Reference Voltage, V
biased at the reference voltage level. V
- 650mV. The DC voltage level at this pin forms an internal
reference for the voltage levels at Pins 10, 12 and 16. Pin
1 must be bypassed to ground with a 0.1 F capacitor, for
proper operation of the circuit.
VCO Control Input (Pin 12): VCO free-running
frequencies determined by external timing resistor, R
connected from this terminal to ground. For optimum
temperature stability, R
100k
VCO Frequency Adjustment: VCO can be fine-tuned
by connecting a potentiometer, R
12 (see Figure 11 ).
This terminal is a low-impedance point, and is internally
biased at a DC level equal to V
50
=12V
L
, to V
0
CC
(see Figure 9 ).
75
for proper operation. For most applications, the
100
1M
REF
500K
50K
10K
. The peak voltage swing available at
125
REF
0
must be in the range of 10K to
L
(Pin 11): This pin is internally
is in 5k
1
and C
REF
X
, in series with R
. The maximum timing
1
to 10k
connected to Pin 10
REF
V
REF
:V
REF
.
range.
= V
0
at Pin
CC
/2
0
,