K4S643232C-TC/L10 Samsung semiconductor, K4S643232C-TC/L10 Datasheet - Page 33

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K4S643232C-TC/L10

Manufacturer Part Number
K4S643232C-TC/L10
Description
2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL
Manufacturer
Samsung semiconductor
Datasheet
CLOCK
K4S643232C
Read & Write Cycle with Auto Precharge I @Burst Length=4
A
(CL=3)
(CL=2)
ADDR
10
DQM
CKE
RAS
CAS
DQ
DQ
BA
BA
/AP
WE
CS
0
1
*Note :
0
Row Active
(A-Bank)
RAa
RAa
1
1.
t
(In the case of Burst Length=1 & 2, BRSW mode and Block write)
RCD
2
should be controlled to meet minimum
3
Row Active
(B-Bank)
RBb
RBb
4
Auto Precharge
Read with
CAa
(A-Bank)
5
6
QAa0 QAa1 QAa2 QAa3
7
QAa0 QAa1 QAa2 QAa3
Auto Precharge
8
t
Start Point
RAS
(A-Bank)
before internal precharge start.
9
- 33
HIGH
10
11
Auto Precharge
12
Write with
(B-Bank)
DBb0
DBb0
CBb
13
DBb1 DBb2 DBb3
DBb1 DBb2 DBb3
14
15
REV. 1.1 Nov. '99
CMOS SDRAM
16
Auto Precharge
17
Start Point
(B-Bank)
18
: Don t care
19

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