K4S643232F- Samsung semiconductor, K4S643232F- Datasheet

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K4S643232F-

Manufacturer Part Number
K4S643232F-
Description
2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL3.3V
Manufacturer
Samsung semiconductor
Datasheet

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K4S643232F-TI/P
CMOS SDRAM
2M x 32 SDRAM
512K x 32bit x 4 Banks
Synchronous DRAM
LVTTL(3.3V)
Industrial Temperature
86-TSOP
Revision 1.0
January 2002
Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.0 (Jan. 2002)
- 1 -

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K4S643232F- Summary of contents

Page 1

... K4S643232F-TI SDRAM 512K x 32bit x 4 Banks Industrial Temperature Samsung Electronics reserves the right to change products or specification without notice. Synchronous DRAM LVTTL(3.3V) 86-TSOP Revision 1.0 January 2002 - 1 - CMOS SDRAM Rev. 1.0 (Jan. 2002) ...

Page 2

... K4S643232F-TI/P Revision History Revision 1.0 (January 16, 2001) • Defined DC spec. Revision 0.0 (December 28, 2001) • Initial draft • Industrial Temperature (-40°c ~ 85° CMOS SDRAM Rev. 1.0 (Jan. 2002) ...

Page 3

... ORDERING INFORMATION K4S643232F-TI/P60 K4S643232F-TI/P70 * -I/P : Industrial temperature (-40° 85°c) Data Input Register Column Decoder Latency & Burst Length Programming Register ...

Page 4

... K4S643232F-TI/P PIN CONFIGURATION (Top view DQM0 A10/AP DQM2 DQ16 V DQ17 DQ18 V DQ19 DQ20 V DQ21 DQ22 V DQ23 DQ0 DDQ DQ1 4 83 DQ2 SSQ DQ3 7 80 DQ4 DDQ DQ5 10 77 DQ6 ...

Page 5

... K4S643232F-TI/P PIN FUNCTION DESCRIPTION Pin Name CLK System clock CS Chip select CKE Clock enable Address 0 10 BA0,1 Bank select address RAS Row address strobe CAS Column address strobe WE Write enable DQM0 ~ 3 Data input/output mask DQ ~ Data input/output Power supply/ground ...

Page 6

... AC.The overshoot voltage duration (min) = -2.0V AC. The undershoot voltage duration Any input DDQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. 4. The V condition of K4S643232F-60 is 3.135V ~ 3.6V DD CAPACITANCE (V = 3.3V Pin Clock RAS, CAS, WE, CS, CKE, DQM Address ...

Page 7

... Operating Current I CC4 (Burst Mode) Refresh Current I CC5 Self Refresh Current I CC6 Notes : 1. Unless otherwise notes, Input level is CMOS(V 2. Measured with outputs open. 3. Refresh period is 64ms. 4. K4S643232F-TI** 5. K4S643232F-TP Test Condition Burst Length = (min (min 0mA ...

Page 8

... Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Output 870 (Fig output load circuit 1. The V condition of K4S643232F-60 is 3.135V ~ 3.6V Notes : DD OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter CAS Latency CLK cycle time ...

Page 9

... K4S643232F-TI/P Parameter Row active to row active delay t RAS to CAS delay Row precharge time Row active time Row cycle time 2. Minimum delay is required to complete write. 3. All parts allow every cycle column address change case of row precharge interrupt, auto precharge and read burst stop. ...

Page 10

... K4S643232F-TI/P SIMPLIFIED TRUTH TABLE Command Register Mode register set Auto refresh Entry Refresh Self refresh Bank active & row addr. Read & Auto precharge disable column address Auto precharge enable Write & Auto precharge disable column address Auto precharge enable Burst Stop ...

Page 11

... K4S643232F-TI/P MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with MRS Address / Function RFU RFU Test Mode A A Type Mode Register Set 0 1 Reserved 1 0 Reserved 1 1 Reserved Write Burst Length Length Burst 1 Single Bit POWER UP SEQUENCE SDRAMs must be powered up and initialized in a predefined manner to prevent undefined operations ...

Page 12

... K4S643232F-TI/P BURST SEQUENCE (BURST LENGTH = 4) Initial Address BURST SEQUENCE (BURST LENGTH = 8) Initial Address Sequential ...

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