K4S563233FHN Samsung semiconductor, K4S563233FHN Datasheet
K4S563233FHN
Related parts for K4S563233FHN
K4S563233FHN Summary of contents
Page 1
... K4S563233F - F(H)E/N/G/C/L 32Bit x 4 Banks Mobile SDRAM in 90FBGA FEATURES • 3.0V & 3.3V power supply. • LVCMOS compatible with multiplexed address. • Four banks operation. • MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length ( & Full page). ...
Page 2
... Bank Select CLK ADD LCKE LRAS LCBR LWE CLK CKE CS Data Input Register Column Decoder Latency & Burst Length Programming Register LCAS LWCBR Timing Register RAS CAS WE DQM 2 Mobile-SDRAM LWE LDQM DQi LDQM May 2004 ...
Page 3
... CAS WE DQM ~ DQM DDQ SSQ Symbol Mobile-SDRAM *2 < Top View > 90Ball(6x15) FBGA DQ24 V V DQ23 DQ21 DQ19 DDQ SSQ DDQ SSQ DQ27 DQ25 DQ22 DQ20 V ...
Page 4
... SS A Min Typ 2.7 3.0 2.7 3.0 2.2 3 DDQ -0 2 -10 - =0.9V ± 50 mV) = 23° 1MHz REF Symbol Min C - CLK ADD C - OUT 4 Mobile-SDRAM Value Unit -1.0 ~ 4.6 V -1.0 ~ 4.6 V °C -55 ~ +150 1 Max Unit Note 3 -2mA OH 0 2mA Max Unit Note 4 ...
Page 5
... IL CC (min), CS ≥ V (min 10ns (min), CLK ≤ ∞ (max 2CLKs ≥ t (min) RC -E/C -N/L Internal TCSR Full Array -G/F 1/2 of Full 1/4 of Full 5 Mobile-SDRAM Version Unit Note -60 -75 -1H -1L 110 100 100 0 120 ...
Page 6
... VOL (DC) = 0.4V, IOL = 2mA 30pF 870Ω Figure 1. DC Output Load Circuit = 2.7V ∼ 3.6V -25 to 85°C for Extended, -25 to 70°C for Commercial Value 2.4 / 0.4 1.4 tr/tf = 1/1 1.4 See Figure 2 Output Z0=50Ω Figure 2. AC Output Load Circuit 6 Mobile-SDRAM Unit Vtt=0.5 x VDDQ 50Ω 30pF May 2004 ...
Page 7
... RP (min RAS (max) 100 RAS t (min (min) 2 RDL (min) tRDL + tRP DAL (min) 1 CDL (min) 1 BDL (min) 1 CCD Mobile-SDRAM Unit Note -1H - CLK CLK 2 CLK 2 CLK ...
Page 8
... SAC SAC SAC t 2.5 2.5 2 2.5 2 2.5 2 2.5 2 2.0 2.0 2 1.0 1.0 1 SLZ 5 SHZ - - 8 Mobile-SDRAM -1H -1L Unit Note Max Min Max 9.0 1000 1000 1 2 2 ...
Page 9
... MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are the same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. ...
Page 10
... Mode Select EMRS for PASR(Partial Array Self Ref.) Mode Select BA1 BA0 0 0 Normal MRS 0 1 Reserved 1 0 EMRS for Mobile SDRAM 1 1 Reserved Reserved Address A11~A10/ NOTES: 1. RFU(Reserved for future use) should stay "0" during MRS cycle. ...
Page 11
... K4S563233F - F(H)E/N/G/C/L/F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array. BA1=0 BA1=0 BA0=0 BA0=1 BA1=1 BA1=1 BA0=0 BA0=1 - Full Array Temperature Compensated Self Refresh 1. In order to save power consumption, Mobile-DRAM includes the internal temperature sonsor and control units to control the self refresh cycle automatically according to the two temperature range : Max 40 ° ...
Page 12
... Mobile-SDRAM Interleave Interleave ...