CY7C024V-15AC Cypress Semiconductor Corporation., CY7C024V-15AC Datasheet
CY7C024V-15AC
Manufacturer Part Number
CY7C024V-15AC
Description
Manufacturer
Cypress Semiconductor Corporation.
Specifications of CY7C024V-15AC
Case
QFP
Date_code
08+
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1
Features
Notes:
Cypress Semiconductor Corporation
1.
2.
3.
4.
5.
• True dual-ported memory cells which allow simulta-
• 4/8/16K x 16 organization (CY7C024V/025V/026V)
• 4/8K x 18 organization (CY7C0241V/0251V)
• 16K x 18 organization (CY7C036V)
• 0.35-micron CMOS for optimum speed/power
• High-speed access: 15
• Low operating power
• Fully asynchronous operation
Logic Block Diagram
R/W
UB
OE
I/O
I/O
A
A
CE
OE
R/W
SEM
BUSY
INT
UB
LB
CE
LB
neous access of the same memory location
— Active: I
— Standby: I
0L
0L
Call for availability.
I/O
I/O
A
BUSY is an output in master mode and an input in slave mode.
L
8/9L
0L
L
L
L
0
L
L
L
L
–A
–A
L
–A
L
L
8
0
L
–I/O
–I/O
–I/O
L
11
[4]
11/1213L
[4]
11/12/13L
–I/O
[5]
for 4K devices; A
15
7
[3]
7/8L
for x16 devices; I/O
for x16 devices; I/O
[2]
15/17L
CC
SB3
= 115 mA (typical)
= 10 A (typical)
12/13/14
0
For the most recent information, visit the Cypress web site at www.cypress.com
8/9
8/9
–A
12
0
[1]
9
–I/O
–I/O
for 8K devices; A
/20/25 ns
8
Address
17
Decode
12/13/14
for x18 devices.
3.3V 4K/8K/16K x 16/18 Dual-Port Static RAM
for x18 devices.
0
–A
•
13
for 16K devices.
3901 North First Street
Control
I/O
PRELIMINARY
True Dual-Ported
Semaphore
RAM Array
Arbitration
Interrupt
M/S
• Automatic power-down
• Expandable data bus to 32/36 bits or more using Mas-
• On-chip arbitration logic
• Semaphores included to permit software handshaking
• INT flag for port-to-port communication
• Separate upper-byte and lower-byte control
• Pin select for Master or Slave
• Commercial and industrial temperature ranges
• Available in 100-pin TQFP
• Pin-compatible and functionally equivalent to
ter/Slave chip select when using more than one device
between ports
IDT70V24, 70V25, and 7V0261.
Control
I/O
•
San Jose
CY7C0241V/0251V/036V
Address
Decode
CY7C024V/025V/026V
12/13/14
•
CA 95134
12/13/14
8/9
8/9
I/O
•
A
A
October 18, 1999
8/9L
0R
0R
I/O
408-943-2600
–A
–A
[5]
–I/O
0L
[4]
11/12/13R
[4]
11/12/13R
–I/O
BUSY
SEM
R/W
15/17R
R/W
[2]
CE
INT
UB
LB
OE
OE
CE
UB
LB
[3]
7/8R
R
R
R
R
R
R
R
R
R
R
R
R
R
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