PIC16F684-ISL Microchip Technology Inc., PIC16F684-ISL Datasheet - Page 76

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PIC16F684-ISL

Manufacturer Part Number
PIC16F684-ISL
Description
Manufacturer
Microchip Technology Inc.
Datasheets

Specifications of PIC16F684-ISL

Case
N/A
Notes
NEW
Date_code
11+
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PIC16F684
10.5
There are conditions when the user may not want to
write to the data EEPROM memory. To protect against
spurious EEPROM writes, various mechanisms have
been built in. On power-up, WREN is cleared. Also, the
Power-up
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during:
• Brown-out
• Power Glitch
• Software Malfunction
TABLE 10-1:
0Bh/8Bh
0Ch
8Ch
9Ah
9Bh
9Ch
9Dh
Legend:
Note 1:
DS41202C-page 74
Address
Protection Against Spurious Write
INTCON
PIR1
PIE1
EEDAT
EEADR
EECON1
EECON2
x = unknown, u = unchanged, — = unimplemented read as ‘0’, q = value depends upon condition.
Shaded cells are not used by data EEPROM module.
EECON2 is not a physical register.
Name
Timer
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM
(1)
EEDAT7 EEDAT6 EEDAT5 EEDAT4 EEDAT3 EEDAT2 EEDAT1 EEDAT0 0000 0000 0000 0000
EEADR7 EEADR6 EEADR5 EEADR
EEPROM Control register 2
(64 ms
EEIF
EEIE
Bit 7
GIE
ADIE
Bit 6
PEIE
ADIF
duration)
CCP1IE
CCP1IF
Bit 5
T0IE
prevents
Preliminary
INTE
C2IE
Bit 4
C2IF
EEADR
WRERR
RAIE
Bit 3
C1IF
C1IE
10.6
Data memory can be code-protected by programming
the CPD bit in the Configuration Word register
(Register 12-1) to ‘0’.
When the data memory is code-protected, the CPU is
able to read and write data to the data EEPROM. It is
recommended to code-protect the program memory
when code-protecting data memory. This prevents
anyone from programming zeroes over the existing
code (which will execute as NOPs) to reach an added
routine, programmed in unused program memory,
which
Programming unused locations in program memory to
‘0’ will also help prevent data memory code protection
from becoming breached.
EEADR
OSFIF
OSFIE
WREN
Bit 2
T0IF
outputs
Data EEPROM Operation During
Code-Protect
EEADR
TMR2IE TMR1IE 0000 0000 0000 0000
TMR2IF TMR1IF 0000 0000 0000 0000
Bit 1
INTF
WR
the
EEADR
contents
RAIF
 2004 Microchip Technology Inc.
Bit 0
RD
0000 0000 0000 0000
0000 0000 0000 0000
---- x000 ---- q000
---- ---- ---- ----
POR, BOD
Value on
of
data
Value on
all other
Resets
memory.

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