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STM8AF52A8TDY

STM8AF52A8TDY | |
---|---|
Manufacturer Part Number | STM8AF52A8TDY |
Description | |
Manufacturer | STMicroelectronics |
STM8AF52A8TDY datasheet |
|
Specifications of STM8AF52A8TDY | |||
---|---|---|---|
Pack_quantity | 250 | Comm_code | 85423190 |
Lead_time | 175 | Eccn | EAR99 |
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STM8AF51xx STM8AF6169/7x/8x/9x/Ax
Automotive 8-bit MCU, with up to 128 Kbytes Flash, data EEPROM,
10-bit ADC, timers, LIN, CAN, USART, SPI, I
Features
■
Core
– Max f
: 24 MHz
CPU
– Advanced STM8A core with Harvard
architecture and 3-stage pipeline
– Average 1.6 cycles/instruction resulting in
10 MIPS at 16 MHz f
CPU
standard benchmark
■
Memories
– Program memory: 32 to 128 Kbytes Flash
program; data retention 20 years at 55 °C
– Data memory: up to 2 Kbytes true data
EEPROM; endurance 300 kcycles
– RAM: 2 Kbytes to 6 Kbytes
■
Clock management
– Low-power crystal resonator oscillator with
external clock input
– Internal, user-trimmable 16 MHz RC and
low-power 128 kHz RC oscillators
– Clock security system with clock monitor
■
Reset and supply management
– Wait/auto-wakeup/Halt low-power modes
with user definable clock gating
– Low consumption power-on and power-
down reset
■
Interrupt management
– Nested interrupt controller with 32 vectors
– Up to 37 external interrupts on 5 vectors
■
Timers
– 2 general purpose 16-bit timers with up to 3
CAPCOM channels each (IC, OC, PWM)
– Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-
time insertion and flexible synchronization
– 8-bit AR basic timer with 8-bit prescaler
– Auto-wakeup timer
– Window and independent watchdog timers
■
I/Os
– Up to 68 user pins (11 high sink I/Os)
– Highly robust I/O design, immune against
current injection
February 2011
STM8AF52xx STM8AF6269/8x/Ax
for industry
■
Communication interfaces
– High speed 1 Mbit/s CAN 2.0B interface
– USART with clock output for synchronous
operation - LIN master mode
– LINUART LIN 2.1 compliant, master/slave
modes with automatic resynchronization
– SPI interface up to 10 Mbit/s or f
– I
■
Analog to digital converter (ADC)
– 10-bit resolution, 2 LSB TUE, 1 LSB
linearity and up to 16 multiplexed channels
■
Operating temperature up to 150 °C
■
Qualification conforms to
Table 1.
Part numbers: STM8AF52xx (with CAN)
STM8AF52AA, STM8AF52A9, STM8AF52A8, STM8AF528A,
STM8AF5289, STM8AF5288, STM8AF5269, STM8AF5268
Part numbers: STM8AF6269/8x/Ax
STM8AF62AA, STM8AF62A9, STM8AF62A8, STM8AF628A,
STM8AF6289, STM8AF6288, STM8AF6286, STM8AF6269
Part numbers: STM8AF51xx (with CAN)
STM8AF51AA, STM8AF51A9, STM8AF51A8, STM8AF519A,
STM8AF5199, STM8AF5198, STM8AF518A, STM8AF5189,
STM8AF5188, STM8AF5179, STM8AF5178, STM8AF5169,
STM8AF5168
Part numbers: STM8AF6169/7x/8x/9x/Ax
STM8AF61AA, STM8AF61A9, STM8AF61A8, STM8AF619A,
STM8AF6199, STM8AF6198, STM8AF618A, STM8AF6189,
STM8AF6188, STM8AF6186, STM8AF6179, STM8AF6178,
STM8AF6176, STM8AF6169
1.
In the order code, the letter ‘F’ applies to devices featuring
Flash and data EEPROM. ‘F’ is replaced by ‘H’ for devices
with Flash only, and by ‘P’ for devices with FASTROM (see
Table
Doc ID 14395 Rev 8
2
C, 3 to 5.5 V
LQFP48 7x7
LQFP80 14x14
LQFP64 10x10
LQFP32 7x7
2
C interface up to 400 Kbit/s
AEC-Q100 rev G
(1)
Device summary
2,
Table
4,
Table
3,
Table
5, and
Figure
48).
/2
MASTER
1/106
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