CXA2000 Sony Corporation, CXA2000 Datasheet
CXA2000
Related parts for CXA2000
CXA2000 Summary of contents
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... Y/C/RGB/D for PAL/NTSC Color TVs For the availability of this product, please contact the sales office. Description The CXA2000Q is a bipolar IC which integrates the luminance signal processing, processing, RGB signal processing, and sync and deflection signal processing functions for NTSC/PAL system color TVs onto a single chip. This IC includes ...
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... CXA2000Q ...
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... X358 FSCOUT – 3 – CXA2000Q VD+OUT/VPROT VD–OUT/VPROT 31 30 VTIM ABLFIL 29 ABLIN/VCOMP 28 27 IKIN BOUT 26 25 BSH GOUT 24 23 GSH 22 ROUT RSH 21 SV ...
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... Standard output level for 100 IRE input: 1Vp-p Luminance signal input. Clamped to 4.8V at the burst timing. Standard input level for 100 IRE input: 1Vp-p Color difference signal inputs. Clamped to 5.5V at the burst timing. Standard input levels for 75% CB: B-Y: 1.33Vp-p R-Y: 1.05Vp-p GND for the RGB block. CXA2000Q ...
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... HSIN input pin (Pin 47). YS/YMSW YS control input. When YS is high, the RGB2 block signal is selected; when YS is low, the YSSW output signal is selected. VILMAX = 0.4V VIHMIN = 1.0V YS/YMSW YM control input. When YM is high, the YSSW output signal is attenuated by 9.6dB. VILMAX = 0.4V VIHMIN = 1.0V CXA2000Q C bus. ...
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... The input for this pin is the reference pulse return, and the loop operates so that the Rch is 1Vp-p and the G and Bch are 0.81Vp-p. The G and Bch can be varied by ±0.5V by the bus CUTOFF control. When not using AKB, this pin should be open. CXA2000Q ...
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... RGB outputs are all blanked and "1" is output to the status register VNG. Serves as both a V sawtooth wave output with the reverse polarity of VD–OUT, and a Vprotect signal input. The Vprotect function can even be applied to this pin. CXA2000Q ...
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... This pin is also used as the hold- down signal input for the HD output, and if this pin less for a 7V cycle or longer, the hold-down function operates and the HD output is held to 9VDC. In addition, the RGB outputs are all blanked. Outputs "1" to the status register XRAY. CXA2000Q ...
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... Connect the 32 FH VCO ceramic oscillator. GND for the deflection block. Internal reference current setting. Connect to GND via a resistor with an error of less than 1% (such as a metal film resistor). Power supply for the H deflection block. Filter for V sync separation. Connect to GND via a capacitor. CXA2000Q ...
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... YOUT is output. The delay time versus YIN is determined by the DL setting of 2 the I C bus. This output can be turned off 2 through the I C bus. This output can also be turned off by YS1, YM, and YS2 bus protocol SCL (Serial Clock) input. VILMAX = 1.5V VIHMIN = 3.5V CXA2000Q ...
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... In addition, this pin detects input video signal HSYNC, and outputs the status via the status register CVSYNC. Connect a capacitor that determines the DC transmission ratio to GND. Y signal input. Input a 1Vp-p (100% white including sync) Y signal via a capacitor. The sync level of the input signal is clamped to 3.8V. CXA2000Q ...
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... Input a C signal with a burst level of 300mVp-p via a capacitor. Input signal is biased to 4.5V internally. Test pin. Outputs V-SYNC SEP with positive polarity. If not used, leave this pin open. Power supply for Y/C block. CR connection for the chroma APC lag- lead filter. Connect a 4.433619MHz crystal oscillator. CXA2000Q ...
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... Pin Symbol No. 62 X358 63 NC FSCOUT 64 Equivalent circuit 4k 62 500 200µA 1.2k 64 147 280µA – 13 – Description Connect a 3.579545MHz crystal oscillator. Not connected. Normally connected to GND to prevent interference with other pins. Subcarrier output. Output level: 5.2VDC, 0.4Vp-p CXA2000Q ...
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... Electrical Characteristics Measurement Circuit Signal sources are all GND unless otherwise specified in the Measurement conditions column of Electrical Characteristics. – 19 – CXA2000Q ...
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... LO-VLIN R output on LEFT-BLK G output on RIGHT-BLK B output on EHT H Picture mute off EHT V VD output on CORNER-PIN FH normal YS1OFF Automatic switching DL AKB on Center value – 22 – CXA2000Q Initial No. of Description bits setting 2 0h Automatic switching 6 1Fh Center value 2 1h Low gain 4 0h Minimum value ...
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... TOT D-COL PRE-OVER COLOR SW TRAP F0 SUB-HUE GAMMA AGING INTERLACE B-CUTOFF VOFF FHHI CD-MODE AKBOFF V-FREQ AFC-MODE V-LIN REF-POSI VBLKW PIN-PHASE AFC-ANGLE XTAL EXT SYNC ZOOM SW HBLKSW JMP SW HSIZESW LO-VLIN RIGHT-BLK CORNER-PIN DL Bit3 Bit2 Bit1 CV SYNC COLOR SYS CXA2000Q Bit0 D-PIC 0 CV/YC Bit0 ...
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... PRE-OVER (2) : Sharpness preshoot/overshoot ratio control 2:1 VM OFF ( signal output ON/OFF for OFF TRAP OFF ( block chroma trap ON/OFF 0 = Trap Trap OFF DL ( signal delay time control (80ns/step Max Min. 0dB –6dB (PRE: OVER) – 24 – CXA2000Q ...
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... XTAL (2) : XTAL selection setting switch 0h = Automatic identification 1h = Force to XTAL1 (3.58MHz Force to XTAL2 (4.43MHz) COLOR SW (2) : Color system setting 0h = Automatic identification 1h = Force to PAL 2h = Force to NTSC 3h = Force to SECAM Point of inflection: 30 IRE Flesh color appears red. Flesh color appears green. 0° – 25 – CXA2000Q ...
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... Gamma control (RGB gamma correction amount control Gamma OFF 3h = Gamma peak 17 IRE (at input 40 IRE), +400mV (at 2.5Vp-p OUT) 0dB RGB output: 2.5Vp-p (I/O gain: +8dB, 1Vp-p input) 0mV (–300mV for REF-P level) 0mV (–300mV for REF-P level) 0dB (G/R 0dB) 0dB (B/R 0dB) – 26 – CXA2000Q ...
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... AKB OFF (IK CLAMP, IK S/H and reference pulse fixed to OFF and B cut-off adjustment at AKB OFF performed by voltage applied to RSH, GSH and BSH pins, respectively. YS1 OFF (1) : YS1 forced OFF mode/YS1 normal mode 0 = YS1 normal mode 1 = YS1 forced OFF mode – 27 – CXA2000Q ...
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... Picture position drops, V DRIVE+ output DC Down. 1Fh = 3Fh = +0.09V Picture position rises, V DRIVE+ output DC Up. (approx. 16.2kHz). Picture position shifts to right. (Picture delayed with respect to HD.) Picture position shifts to left. (Picture advanced with respect to HD.) 0V Center potential – 28 – CXA2000Q ...
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... Top of picture expanded; bottom of picture compressed. amount maximum) Horizontal picture size decreases, EW-DRIVE output DC Down. 0V Amplitude: 0.58Vp-p, center potential when V-ASPECT is 2Fh Horizontal picture size increases, EW-DRIVE output DC Up. 0V (Compensation amount when 1V is applied to ABL IN versus 8V applied to ABL IN) – 29 – CXA2000Q ...
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... HBLK pulse generated as pulse generated from HPIN or as pulse generated from HVCO and width adjusted. Width adjustment is performed by the LEFT-BLK and RIGHT-BLK registers. Scrolled toward top of screen by 32H and top of picture zoomed. 0V Scrolled toward bottom of screen by 32H and bottom of picture zoomed. – 30 – CXA2000Q ...
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... Aging mode ON (When there is no input signal IRE flat signal is output from the Y block) (Bottom/top of picture) (Bottom/top of picture) Top of picture compressed. (Bottom/top of picture) (Bottom/top of picture) Bottom of picture compressed. HBLK width maximum 0µs Center HBLK: 13µs HBLK width minimum HBLK width maximum 0µs Center HBLK: 13µs HBLK width minimum – 31 – CXA2000Q ...
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... Color system status 0h = — — STANDARD 3h = SECAM 4h = 3.58MHz NTSC 5h = 4.43MHz NTSC 6h = 3.58MHz PAL 7h = 4.43MHz PAL CV SYNC ( input SYNC SEP result When VIDEO is input to CVIN, "1" is returned when the SYNC level is 100mV or more (standard: 300mV SYNC 1 = SYNC – 32 – CXA2000Q ...
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... Description of Operation 1. Power-on sequence The CXA2000Q does not have an internal power-on sequence. Therefore, power-on sequence is all controlled 2 by the set microcomputer (I C bus controller). 1) Power-on The IC is reset and the RGB outputs are all blanked. Hdrive starts to oscillate, but oscillation is at the maximum frequency (16kHz or more) and is not synchronized to the input signal ...
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... CXA2000Q Bit3 Bit2 Bit1 ...
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... Rch video output OFF Gch video output OFF Bch video output OFF RGB all blanked Vdrive oscillation Horizontal oscillator frequency standard V countdown auto mode AKB ON Center (Adjust) AUTO Center (Adjust) Center Center (Adjust) Center (Adjust) Center (Adjust) Center (Adjust) – 35 – CXA2000Q ...
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... Various mode settings The CXA2000Q contains bus registers for deflection compensation which can be set for various wide modes. Wide mode setting registers can be used separately from registers for normal picture distortion adjustment, and once deflection adjustment has been performed in full mode, wide mode settings can be made simply by changing the corresponding register data. • ...
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... In this mode, 4:3 images are reproduced without modification. A black border appears at the left and right of the picture. In this mode, the H deflection size must be compressed by 25% compared to full mode. The CXA2000Q permits compression with a register (HSIZESW) that compresses the H size by 25%. Because excessive current flows to the horizontal deflection coil in this case, adequate consideration must be given to the allowable power dissipation, etc ...
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... JMPSW register used in mode 5) above, compresses the V size to 67%. Therefore, V-ASPECT is set to enlarge the V size by 8%. AKB reference pulse handling and V blanking are the same as for mode 5) above. 4:3 CRT standard values are used with the V-ASPECT and JMPSW settings changed for the register settings. V-ASPECT = 3Fh JMPSW = 1 – 38 – CXA2000Q ...
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... V size limited at 75% = 1h: Reference pulse skipping ON (compressed to 50% total) = Adjustable: VBLK width expanded at top and bottom of video image = Adjustable: Compression of top and = Adjustable: bottom of video image = 1h: Reference pulse skipping ON (compressed to 75% total) = Adjustable: VBLK width expanded at top and bottom of video image CXA2000Q ...
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... Signal processing The CXA2000Q is comprised of sync signal processing, H deflection signal processing, V deflection signal processing, and Y/C/RGB signal processing blocks, all of which are controlled by the I 1) Sync signal processing Pin 48 (SYNC OUT) outputs at 2Vp-p either the internal signal (CVIN/YIN) selected by the internal video switch, or the external sync signal input from Pin 56 (EXT SYNC IN) ...
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... R, G and B outputs can be varied by applying voltages independently to Pins 21, 23 and 25 bus (XTAL and COLOR SW). The 2 C bus, with the Rch fixed and the G and Bch 2 C bus bus settings. In this case, the DC – 41 – CXA2000Q 2 C bus. ...
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... Notes on operation Because the RGB signals and deflection signals output from the CXA2000Q are DC direct connected, the board pattern must be designed consideration given to minimizing interference from around the power supply and GND. Do not separate the GND patterns for each pin; a solid earth is ideal. Locate the power supply side of the by- pass capacitor which is inserted between the power supply and GND as near to the pin as possible ...
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... C Bus Register Initial Settings" of the Electrical Characteristics Measurement 3.6 3.4 3.2 3.0 2.8 V-SIZE = 0 2.6 V-SIZE = 1F V-SIZE = 3F 2 3.6 3.4 3.2 3.0 2.8 S-CORR = 0 2.6 S-CORR = 7 S-CORR = F 2 3.8 3.6 3.4 3.2 3.0 2.8 2.6 V-ASPECT = 0 2.4 V-ASPECT = 1F V-ASPECT = 3F 2 – 43 – V-POSITION V-POSITION = 0 V-POSITION = 1F V-POSITION = Time [ms] V-LIN V-LIN = 0 V-LIN = 7 V-LIN = Time [ms] V-SCROLL V-SCROLL = 0 V-SCROLL = 1F V-SCROLL = Time [ms] CXA2000Q ...
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... PIN-COMP = 3F 3 Time [ms] CORNER-PIN 4.2 4.0 3.8 3.6 3.4 CORNER-PIN = 0 CORNER-PIN = 7 CORNER-PIN = F 3 Time [ms] 3.6 3.4 3.2 3.0 2.8 2.6 2 4.1 4.0 3.9 3.8 3.7 3.6 3.5 3.4 3 4.8 4.4 4.0 3.6 3 – 44 – CXA2000Q LO-VLIN LO-VLIN = 0 LO-VLIN = 7 LO-VLIN = Time [ms] PIN-PHASE PIN-PHASE = 0 PIN-PHASE = 7 PIN-PHASE = Time [ms] H-SIZE H-SIZE = 0 H-SIZE = 1F H-SIZE = Time [ms] ...
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... CXA2000Q TRAP OFF 3.58MHz TRAP OFF = 0 4.43MHz TRAP OFF = 0 TRAP OFF = Frequency [MHz DATA COLOR COLOR OFF when DATA = 0 (– ...
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... CXA2000Q SUB-CONT DATA BRIGHT SUB-BRIGHT = 0 SUB-BRIGHT = 1F SUB-BRIGHT = DATA GAMMA GAMMA = 0 GAMMA = 1 GAMMA = 2 GAMMA = CVIN input amplitude [IRE] ...
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... G-CUTOFF, B-CUTOFF 4.2 4.0 3.8 3.6 3.4 Gch, Bch 3.2 IK clamp level Rch 3.0 2.8 2 DATA AKB open loop characteristics 3.5 3.0 2.5 2.0 1.5 1.0 Reference pulse voltage (AKBOFF = 0) 0.5 RGBOUT black level voltage (AKBOFF = 3.0 3.5 4.0 4.5 Voltage applied and B sample-and-hold capacitance pins [V] – 47 – 5.0 5.5 6.0 CXA2000Q ...
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... SONY CODE QFP-64P-L01 QFP064-P-1420-A EIAJ CODE JEDEC CODE 64PIN QFP (PLASTIC) 23.9 ± 0.4 + 0.4 20.0 – 0 0.35 + 0.15 0.4 – 0.1 2.75 – 0.15 ± 0.12 M PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT – 48 – CXA2000Q + 0.1 0.15 – 0.05 0.15 + 0.2 0.1 – 0.05 EPOXY / PHENOL RESIN SOLDER PLATING 42 ALLOY 1.5g ...