CXA2067 Sony Corporation, CXA2067 Datasheet

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CXA2067

Manufacturer Part Number
CXA2067
Description
Preamplifier for High-Resolution Computer Display
Manufacturer
Sony Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CXA2067AS
Manufacturer:
RCL
Quantity:
6 255
Part Number:
CXA2067S
Manufacturer:
SC
Quantity:
50
Description
high-resolution computer displays.
Features
• Wide-band amplifier: 170 MHz@–3 dB (Typ)
• Input dynamic range: 1.0 Vp-p (typ)
• High gain preamplifier (17 dB)
• R, G and B in a single package (SDIP 30 pins)
• I
• Sync separator for sync-on-green
• Blanking mixing function
• OSC mixing function
• Video interval detection function
• VBLK sync DAC refresh system
• 12 V power supply interlocked power saving
Applications
Structure
The CXA2067AS is a bipolar IC developed for
function
High-resolution computer displays
Bipolar silicon monolithic IC
2
Preamplifier for High-Resolution Computer Display
C bus control
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
Contrast control
Sub contrast control
Brightness control
OSD contrast control
Cut-off control: 4 channels of DAC output
2 blanking level modes
(0.5 V fixed, pedestal –0.3 V)
—1—
Absolute Maximum Ratings (Ta=25 °C, GND=0 V)
• Supply voltage
• Operating temperature
• Storage temperature
• Allowable power dissipation
Recommended Operating Conditions
Supply voltage
CXA2067AS
30 pin SDIP (Plastic)
V
V
CC
CC
Topr
Tstg
V
V
/R/G/B
/R/G/B
P
CC
CC
D
–65 to +150
–20 to +75
12±0.5
5±0.5
2.05
14
7
E99857
°C
°C
W
V
V
V
V

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CXA2067 Summary of contents

Page 1

... Preamplifier for High-Resolution Computer Display Description The CXA2067AS is a bipolar IC developed for high-resolution computer displays. Features • Wide-band amplifier: 170 MHz@–3 dB (Typ) • Input dynamic range: 1.0 Vp-p (typ) • High gain preamplifier (17 dB) • and single package (SDIP 30 pins) • ...

Page 2

... Same as R channel Same as R channel —2— CONTRAST 30 OSD GAIN (R) OSD GAIN (G) 29 OSD GAIN (B) 12V BRIGHTNESS 25 BLANKING PULSE 12V 21 SVSW OSDSW 16 12V CXA2067AS CSYNC/VDET S/H-R ROUT GND-R S/H-G GOUT GND S/H-B BOUT GND-B BLKING ...

Page 3

... 14k 300 —3— CXA2067AS Description bus standard SDA (serial data) input/output. VILMAX=1.5 V VIHMIN=3.5 V VOLMAX=0 bus standard SCL (serial clock) input/output. VILMAX=1.5 V VIHMIN=3.5 V DAC output for cut-off adjustment. Output ...

Page 4

... 10k 10k 17 —4— CXA2067AS Description Sync-on-green signal input. Input via a capacitor. Clamp pulse (positive polarity) input. VILMAX=0.8 V VIHMIN=2.8 V OSD control inputs. VILMAX=0.8 V VIHMIN=2 power supply. (B channel) YS (OSD BLK) control input. VILMAX=0.8 V VIHMIN=2.8 V ...

Page 5

... 300 —5— CXA2067AS Description Blanking pulse input. Set the V blanking pulse width to 300 µs or more. VILMAX=0.8 V VIHMIN=2.8 V Ground and B outputs. Brightness sample-and-hold. Connect to GND via a capacitor power supply. (G channel power supply. (R channel) ...

Page 6

... Pin Pin Symbol No. voltage CSYNC 30 — /VDET Equivalent circuit 100 5k 20k 30 500 —6— CXA2067AS Description Sync-on-green signal sync separator output/video detector output. Either of them is selected by SVSW bus. Typ. : High=4.3 V Low=0.2 V (positive polarity) ...

Page 7

... Performs the Pin 4 (COF G) output voltage control Output voltage minimum (1 V) 255 : Output voltage maximum (4 V) Performs the Pin 5 (COF B) output voltage control Output voltage minimum (1 V) 255 : Output voltage maximum (4 V) —7— BIT3 BIT2 BIT1 BRIGHTNESS OSD GAIN Note) : don’t care CXA2067AS BIT0 VSOFF ...

Page 8

... Gain maximum (+17 dB) Performs the Pin 30 output control Output Output OFF Switches the Pin 30 output signal (sync separator/video detector Sync separator output 1 : Video detector output Performs the control of VBLK sync DAC refresh function Function operation Function operation OFF —8— CXA2067AS ...

Page 9

... STA 4.7 — DAT 0 — DAT 250 — — — — — STO 4.7 — SU —9— CXA2067AS Max. Unit 5.0 V 1.5 V 0.4 V 400 kHz — µs — µs — µs — µs — µs — ns — µs 300 ns — ...

Page 10

... Measure the output signal amplitude Vout level when a 0.7 Vp-p video signal is input. Contrast=FF/SubContrast=00 Input signal 0.7Vp-p —10— Min. Typ. 85 115 29 –1.5 0 Vout (50 MHz) Vout (1 MHz) Vout (1 MHz) –3.0 0 5.6 6.2 — 0 — 0 CXA2067AS Max. Unit 140 mA 55 1.9 dB 3.0 dB — Vp-p 100 mVp-p 100 mVp-p ...

Page 11

... Measure the BLK level of the output signal when the BLK pulse is input. BLK level (VBLK1) BLK level (VBLK2) GND Vth=50% Rise Delay Vth=50% Vth=50% 0.7Vp-p Rise Fall Delay Delay Vth=50% —11— CXA2067AS Min. Typ. Max. 4.5 5 — — 0 150 mVp-p 0.4 0.7 1 2.2 2.6 3 — ...

Page 12

... VDET amplitude Measurement contents Measure the DAC output voltage (Pin 6) for COFF=00/FF. Input the crosshatch signal of DotClock=100 MHz/0.7 Vp-p and measure the VDET output amplitude. SW SW=1/VDET LEVEL=0 Input signal 0.7Vp-p 10ns 10ns —12— CXA2067AS Min. Typ. Max. Unit — 1 1.3 V 3.9 4 — 3.85 4 — ...

Page 13

... GND GIN SYNC IN S/H BIN BOUT 12 CLP GND OSD-R BLKING OSD OSD —13— CXA2067AS SYNC SEP/VDET Output 47 F 12V 0.1 F 0.1 F Rch Output 0.1 F Gch Output 47 F 12V 0.1 F 0.1 F Bch Output 47 F 12V 0.1 F ...

Page 14

... GND GIN SYNC IN S/H BIN BOUT 12 CLP GND OSD-R BLKING OSD OSD —14— CXA2067AS SYNC SEP/VDET Output 47 F 12V 0.1 F 0.1 F Rch Output 0.1 F Gch Output 47 F 12V 0.1 F 0.1 F Bch Output 47 F 12V 0.1 F ...

Page 15

... CXA2067AS ...

Page 16

... GND GIN SYNC IN S/H BIN BOUT 20 12 CLP GND OSD-R BLKING 14 OSD OSD —16— CXA2067AS SYNC SEP/VDET Output 47 F 12V 0.1 F 0.1 F Rch Output 0.1 F Gch Output 47 F 12V 0.1 F 0.1 F Bch Output YS input 47 F 12V 0.1 F ...

Page 17

... The signals to RIN, GIN and BIN should be input via a clamp capacitor with the low impedance. 6. Set the output OFF when the VDET/CSYNC output is not used. (The cross talk may deteriorate) and V R/G/B, the ceramic capacitor and the electrolysis capacitor CC CC —17— CXA2067AS ...

Page 18

... PACKAGE STRUCTURE MOLDING COMPOUND LEAD TREATMENT SDIP-30P-01 LEAD MATERIAL SDIP030-P-0400 PACKAGE MASS —18— CXA2067AS 0° to 15° Two kinds of package surface: 1.All mat surface type. 2.All mirror surface type. EPOXY RESIN SOLDER/PALLADIUM PLATING COPPER ALLOY 1.8g ...

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