ZL50051 ZARLINK [Zarlink Semiconductor Inc], ZL50051 Datasheet - Page 29

• Manufacturer Part Number: ZL50051
• Description: 8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (8 or 16 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

In addition, the reset signal must be de-asserted less than 12 s after the frame boundary or more than 13 s after
the frame boundary, as illustrated in Figure 15. This can be achieved, for example, by synchronizing the
de-assertion of the reset signal with the input frame pulse FP8i.
8.0
The device includes two connection memories, the Local Connection Memory and the Backplane Connection
Memory.
8.1
The Local Connection Memory (LCM) is a 16-bit wide memory with 4,096 memory locations to support the Local
output port. The most significant bit of each word, bit[15], selects the source stream from either the Backplane
(LSRC = LOW) or the Local (LSRC = HIGH) port and determines the Backplane-to-Local or Local-to-Local data
routing. Bits[14:13] select the control modes of the Local output streams, the per-channel Message Mode and the
per-channel high impedance output control modes. In Connection Mode (bit[14] = LOW), bits[12:0] select the
source stream and channel number as detailed in Table 4. In Message Mode (bit[14] = HIGH), bits[12:8] are unused
and bits[7:0] contain the message byte to be transmitted. Bit[13] must be HIGH for Message Mode to ensure that
the output channel is not tri-stated.
8.2
The Backplane Connection Memory (BCM) is a 16-bit wide memory with 4,096 memory locations to support the
Backplane output port. The most significant bit of each word, bit[15], selects the source stream from either the
Backplane (BSRC = HIGH) or the Local (BSRC = LOW) port and determines the Local-to-Backplane or
Backplane-to-Backplane data routing. Bit[14:13] select the control modes of the Backplane output streams, namely
the per-channel Message Mode and the per-channel high impedance output control mode. In Connection Mode
(bit[14] = LOW), bits[12:0] select the source stream and channel number as detailed in Table 4. In Message Mode
(bit[14] = HIGH), bits[12:8] are unused and bits[7:0] contain the message byte to be transmitted. Bit[13] must be
HIGH for Message Mode to ensure that the output channel is not tri-stated.
The Control Register bits MS[2:0] must be set to 000 to select the Local Connection Memory for the write and read
operations via the microprocessor port. The Control Register bits MS[2:0] must be set to 001 to select the
Backplane Connection Memory for the write and read operations via the microprocessor port. See Section 6.0,
“Microprocessor Port”, and Section 13.1, “Control Register (CR)” for details on microprocessor port access.
(case 1)
(case 2)
Local Connection Memory
Backplane Connection Memory
RESET
RESET
Connection Memory
FP8i
RESET assertion
De-assertion of RESET must not fall within this window
12 s
13 s
Figure 15 - Hardware RESET De-assertion
RESET de-assertion
Zarlink Semiconductor Inc.
ZL50051/3
29
Data Sheet