ZL50115 ZARLINK [Zarlink Semiconductor Inc], ZL50115 Datasheet - Page 68

• Manufacturer Part Number: ZL50115
• Description: 32, 64 and 128 Channel CESoP Processors
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

12.0
12.1
The TDM Bus either operates in Slave mode, where the TDM clocks for each stream are provided by the device
sourcing the data, or Master mode, where the TDM clocks are generated from the ZL5011x.
12.1.1
TDM ST-BUS Slave Timing Specification
ST-BUS
8.192 Mbps
mode
ST-BUS
2.048 Mbps
mode
All Modes
Data Format
TDM Interface Timing - ST-BUS
AC Characteristics
ST-BUS Slave Clock Mode
TDM_CLKi Period
TDM_CLKi High
TDM_CLKi Low
TDM_CLKi Period
TDM_CLKi High
TDM_CLKi Low
TDM_F0i Width
8.192 Mbps
2.048 Mbps
TDM_F0i Setup Time
TDM_F0i Hold Time
TDM_STo Delay
TDM_STi Setup Time
TDM_STi Hold Time
Parameter
ZL50115/16/17/18/19/20
Symbol
t
t
t
t
t
t
t
t
t
C16IH
t
t
t
C16IP
C16IL
STOD
FOIW
FOIS
FOIH
C4IP
C4IH
STIS
STIH
C4IL
Zarlink Semiconductor Inc.
68
Min.
200
110
110
54
27
27
50
5
5
1
5
5
-
244.1
Typ.
60
-
-
-
-
-
-
-
-
-
-
-
Max.
134
134
300
66
33
33
20
-
-
-
-
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
With respect to
TDM_CLKi
falling edge
With respect to
TDM_CLKi
falling edge
With respect to
TDM_CLKi
Load C
With respect to
TDM_CLKi
With respect to
TDM_CLKi
Data Sheet
Notes
L
= 50 pF