ZL50404GDC ZARLINK [Zarlink Semiconductor Inc], ZL50404GDC Datasheet - Page 68

• Manufacturer Part Number: ZL50404GDC
• Description: Lightly Managed/Unmanaged 5-Port 10/100M Ethernet Switch
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

13.3.2.6
PVMAP01_0,1,3 I²C Address h2B,35,3F; CPU Address:h106,107,109 (Port 1)
PVMAP02_0,1,3 I²C Address h2C,36,40; CPU Address:h10A, 10B, 10D (Port 2)
PVMAP03_0,1,3 I²C Address h2D,37,41; CPU Address:h10E, 10F, 111 (Port 3)
PVMAP08_0,1,3 I²C Address h32,3C,46; CPU Address:h122, 123, 125 (Port CPU)
PVMAP09_0,1,3 I²C Address h33,3D,47; CPU Address:h126, 127, 129 (Port MMAC)
13.3.2.7
I²C Address: h048, CPU Address:h170
Accessed by CPU and I²C (R/W)
PVMAPnn_0,1,3 – Ports 1~9 Configuration Registers
PVMODE
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [4]:
Bit [5]:
Bit [6]:
Bit [6]:
Bit [7]:
Reserved. Must be 0.
Slow learning (Default = 0)
Same function as SE_OP MODE bit [7]. Either bit can enable the function; both need to
be turned off to disable the feature.
Disable dropping of frames with destination MAC addresses 0180C2000001 to
0180C200000F.
0: Drop all frames in this range (Default)
1: Disable dropping of frames in this range
Flooding control in secure mode
0: Enable - Learning disabled port will not receive any flooding packets (Default)
1: Disable
Support MAC address 0
0: MAC address 0 is not learned. (Default)
1: MAC address 0 is learned.
Disable IEEE multicast control frame (0180C2000000 to 0180C20000FF) to CPU in
managed mode.
0: Packet is forwarded to CPU (Default)
1: Packet is forwarded as multicast
Reserved. Must be 0.
Default Discard priority. Used when Bit [7]=1
0 – Discard Priority Level 0 (Lowest) (Default)
1 – Discard Priority Level 1(Highest)
Enable Fix Priority (Default 0)
0 - Disable. All frames are analysed. Transmit Priority and Discard Priority are
based on VLAN Tag, TOS or Logical Port.
1 - Enable. Transmit Priority and Discard Priority are based on values
programmed in bit [6:3]
Zarlink Semiconductor Inc.
ZL50404
68
Data Sheet