TTSV02622V2-DB AGERE [Agere Systems], TTSV02622V2-DB Datasheet - Page 62

• Manufacturer Part Number: TTSV02622V2-DB
• Description: STS-24 Backplane Transceiver
• Manufacturer: AGERE [Agere Systems]

TTSV02622 STS-24 Backplane Transceiver
Timing Characteristics
CPU Interface Timing
Table 27. Read Transaction Timing Requirements
62
T
T
T
T
ACCESS_MIN
RD_WR_MAX
T
ADDR_MAX
Symbol
DATA_MAX
T
HIZ_MAX
PULSE
T
DH
RD_WR_N
ADDR[6:0]
DB[7:0]
CS_N
Minimum Pulse Width for CS_N
Maximum Time from Negative Edge of CS_N to Addr Valid
Maximum Time from Negative Edge of CS_N to RD_WR_N Rising
Maximum Time from Negative Edge of CS_N to Data Valid on DB Port
Maximum Time from Rising Edge of CS_N to DB Port Going HI-Z
Data Hold Time After CS_N Is Deasserted
Minimum Time Between a Read Cycle (falling edge of CS_N) and Any
Other Transaction (read or write, at falling edge of CS_N)
(continued)
T
T
RD_WR_MAX
ADDR_MAX
(continued)
T
DATA_MAX
Figure 21. Read Transaction
Parameter
T
ACCESS_MIN
DATA VALID
T
PULSE
T
T
DH
HIZ_MAX
Min
60
—
—
—
—
5
0
Agere Systems Inc.
Max
56
12
—
—
—
5
5
June 2003
Unit
ns
ns
ns
ns
ns
ns
ns