SMC256BFY6E NUMONYX [Numonyx B.V], SMC256BFY6E Datasheet - Page 44

• Manufacturer Part Number: SMC256BFY6E
• Manufacturer: NUMONYX [Numonyx B.V]

Software interface
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Accesses to even addresses between 400h and 7FFh access register 8. Accesses to odd
addresses between 400h and 7FFh access register 9. This 1 KByte memory window to the
data register is provided so that hosts can perform memory-to-memory block moves to the
data register when the register lies in memory space. Some hosts, such as the X86
processors, must increment both the source and destination addresses when executing the
memory-to-memory block move instruction. Some PCMCIA socket adapters also have an
embedded auto incrementing address logic.
A Word access to address at offset 8 will provide even data on the least significant Byte of
the data bus, along with odd data at offset 9 on the most significant Byte of the data bus.
Table 37.
–
REG A10
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Memory Mapped Decoding
A9 to
A4
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
A3 A2 A1 A0 Offset
X
X
0
0
0
0
0
0
0
0
1
1
1
1
1
X
X
0
0
0
0
1
1
1
1
0
0
1
1
1
X
X
0
0
1
1
0
0
1
1
0
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
Dh
Eh
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Fh
8h
9h
Cylinder Low Register
Even Data Register
Even Data Register
Dup. Error Register
Odd Data Register
Select Card/Head
Alternate Status
Dup. Even Data
Status Register
Sector Number
Dup. Odd Data
Drive Address
Error Register
Cylinder High
Sector Count
Register
Register
Register
Register
Register
Register
Register
Register
–
OE=0
Dup. Even Data Register
Sector Number Register
Dup. Odd Data Register
Device Control Register
Cylinder High Register
Sector Count Register
Cylinder Low Register
Dup. Feature Register
Even Data Register
Command Register
Even Data Register
Odd Data Register
Select Card/Head
Feature Register
Reserved
Register
–
WE=0
SMCxxxBF