HYB5117805BSJ-50- SIEMENS [Siemens Semiconductor Group], HYB5117805BSJ-50- Datasheet
HYB5117805BSJ-50-
Related parts for HYB5117805BSJ-50-
HYB5117805BSJ-50- Summary of contents
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... Hyper page mode (EDO) capability • All inputs, outputs and clocks fully TTL-compatible • 2048 refresh cycles / 32 ms (2k-Refresh) • Plastic Package: P-SOJ-28-3 400 mil • Semiconductor Group HYB5117805BSJ -50/-60/-70 -50 -60 - ...
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... Column Address Strobe WE Read/Write Input V Power Supply (+ Ground ( N.C. not connected Semiconductor Group HYB5117805BSJ-50/-60/-70 Package Descriptions P-SOJ-28-3 400 mil DRAM (access time 50 ns) P-SOJ-28-3 400 mil DRAM (access time 60 ns) P-SOJ-28-3 400 mil DRAM (access time 70 ns 8-EDO DRAM SOJ 28 ...
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... Pin Configuration Semiconductor Group P-SOJ-28-3 400 mil O VCC RAS A10 VCC HYB5117805BSJ-50/-60/- 8-EDO DRAM VSS I/O8 I/O7 I/O6 I/O5 CAS VSS ...
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... A9 A10 Row 11 Address Buffers(11) No. 1 Clock RAS Generator Block Diagram Semiconductor Group & Data in Buffer 11 Row 11 Decoder Voltage Down Generator 4 HYB5117805BSJ-50/-60/- 8-EDO DRAM I I /O8 I/O1 /O2 Data out Buffer 8 8 Column 10 Decoder Sense Amplifier I/O Gating 1024 x8 Memory Array 2048 2048x1024x8 VCC ...
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... O(L) Vcc + 0.3V) I CC1 -50 ns version -60 ns version -70 ns version = t min CC2 I CC3 -50 ns version -60 ns version -70 ns version = t min HYB5117805BSJ-50/-60/- 8-EDO DRAM Limit Values Unit Test min. max. 2.4 Vcc+0.5 V – 0.5 0.8 V 2.4 – V – 0.4 V – – – 120 mA – ...
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... CC5 I CC6 -60 ns version -70 ns version min.) I CC7 MHz Symbol HYB5117805BSJ-50/-60/- 8-EDO DRAM Limit Values Unit Test min. max. – – – – – 120 mA – 110 mA – ...
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... Column address to RAS lead time t Read command setup time Read command hold time Read command hold time referenced to RAS CAS to output in low-Z Output buffer turn-off delay Output turn-off delay from OE Semiconductor Group HYB5117805BSJ-50/-60/- Limit Values Symbol -50 min. max. min. 84 – ...
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... CWD 39 – AWD 10 – t OEH t 20 – HPC t 8 – CP – 27 CPA 5 – t COH 50 200k 60 t RAS 27 – t RHPC 8 HYB5117805BSJ-50/-60/- 8-EDO DRAM Limit Values -60 -70 max. min. max. 0 – 0 – 0 – 0 – 13 – 15 – 13 – 15 – 10 – 10 – 10 – 10 – 0 – ...
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... WRP 10 – WRH 35 – t CPT 100k – t RASS t 95 – RPS -50 – t CHS 10 – t WTS 10 – t WTH 30 – t CHRT 9 HYB5117805BSJ-50/-60/- 8-EDO DRAM Limit Values -60 -70 max. min. max. 68 – 77 – 49 – 56 – 10 – 10 – 10 – 10 – 5 – 5 – 10 – 10 – 10 – ...
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... RAS or CAS, whichever occurs OFF > the cycle is an early write cycle and data out pin will remain WCS WCS (min.) RWD 10 HYB5117805BSJ-50/-60/- 8-EDO DRAM is specified as a reference point RCD (max.) . CAC is specified as a reference point RAD (max.) ...
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... RAS t CSH t t RSH RCD t CAS t RAD t RAL t CAH t ASC Column t t RAH RCS OEA t DZC t DZO t CAC t CLZ RAC 11 HYB5117805BSJ-50/-60/- 8-EDO DRAM CRP t ASR Row t RCH t RRH t CDD t ODD t OFF t OEZ Valid Data Out Hi Z WL1 ...
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... Write Cycle (Early Write) Semiconductor Group RAS t CSH t t RCD RSH t CAS t t RAD RAL t CAH t ASC Column t CWL t RAH t WCS WCH t RWL Valid Data HYB5117805BSJ-50/-60/- 8-EDO DRAM CRP t ASR Row WL2 . ...
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... Write Cycle (OE Controlled Write) Semiconductor Group RAS t CSH t t RCD RSH t CAS t RAD t RAL t CAH t ASC Column t CWL t RAH t OEH t ODD t t DZO DZC OEZ Valid Data t CLZ t OEA Hi-Z 13 HYB5117805BSJ-50/-60/- 8-EDO DRAM CRP t ASR Row t RWL Hi-Z WL3 . ...
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... RAH CAH t ASC Column t AWD t RAD t CWD t RWD RCS OEA t DZO t DZC t CLZ t CAC t RAC 14 HYB5117805BSJ-50/-60/- 8-EDO DRAM RWC RSH t CRP t CAS t ASR t CWL t RWL OEH Valid Data in t ODD t OEZ Data Out ...
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... ASC CAH CAH Column 2 Column 1 t RCS OES CPA t OEA t RAC COH CAC t CLZ Data Out 1 15 HYB5117805BSJ-50/-60/- 8-EDO DRAM t RHCP t RSH t t CAS CAS t RAL t t CAH ASC Column N t RRH t t CAC CAC CPA ...
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... ASC CAH ASC CAH Column 1 Column CWL t t WCS t WCH Data In 1 Data HYB5117805BSJ-50/-60/- 8-EDO DRAM t RHCP t RSH t t CAS CAS t RAL t t ASC CAH Column N t RWL t CWL CWL t WCS t WCH WCH t ...
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... Hyper Page Mode (EDO) Late Write and Read-Modify Write Cycle Semiconductor Group HYB5117805BSJ-50/-60/- 8-EDO DRAM 17 WL17 ...
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... V IH RAS CAS Address I/O (Outputs “H” or “L” RAS-Only Refresh Cycle Semiconductor Group t RAS t RAH ASR Row 18 HYB5117805BSJ-50/-60/- 8-EDO DRAM CRP t RPC t ASR HI-Z WL9 Row ...
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... OEZ CDD V IH I/O (Inputs ODD V OH I/O (Outputs OFF “H” or “L” CAS-Before-RAS Refresh Cycle Semiconductor Group t RP RAS t CSR t CHR t WRP t WRH 19 HYB5117805BSJ-50/-60/- 8-EDO DRAM RPC HI-Z t CRP WL10 ...
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... RAS t RSH t RCD t t WRP ASC t CAH Column t RRH t RCS OEA t DZC t DZO t CAC t CLZ t RAC Valid Data Out 20 HYB5117805BSJ-50/-60/- 8-EDO DRAM RAS t t CRP CHR t t ASR WRH t CDD t ODD t OFF t OEZ HI-Z Row WL11 ...
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... Hidden Refresh Early Write Cycle Semiconductor Group RAS t t RCD RSH t RAD t ASC t CAH Column t WCS t t WCH WRP Valid Data HI-Z 21 HYB5117805BSJ-50/-60/- 8-EDO DRAM RAS t t CHR CRP t ASR t WRH WL12 Row ...
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... RPC CAS CDD V I/O IH (Inputs ODD t OEZ V OH I/O (Outputs OFF “H” or “L” Self Refresh Semiconductor Group RASS t CSR t WRP t WRH 22 HYB5117805BSJ-50/-60/- 8-EDO DRAM t RPS t CHS HI-Z WL13 t CRP ...
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... CAS-Before-RAS Refresh Counter Test Cycle Semiconductor Group CSR CHR t ASC Column t WRP t t WRH RCS t DZC t DZO t WCS WRP t WRH t DS HI-Z 23 HYB5117805BSJ-50/-60/- 8-EDO DRAM t RAS t RSH t CAS t RAL t CAH CAC t OEA t ODD t OFF t t CLZ OEZ Data Out t RWL t ...
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... I/O OH (Outputs “H” or “L” Test Mode Entry Semiconductor Group RPC CSR CP CHR t t RAH ASR Row t t WTS WTH t ODD HI-Z t CDD t OEZ t OFF 24 HYB5117805BSJ-50/-60/- 8-EDO DRAM RAS RP t RPC HI-Z t CRP WL15 ...
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... Plastic Package P-SOJ-28-3 (400mil) (Small Outline J-lead, SMD Package Outline Semiconductor Group HYB5117805BSJ-50/-60/- 8-EDO DRAM 25 M ...