EDE5116AFSE5CE Elpida Memory, Inc., EDE5116AFSE5CE Datasheet
EDE5116AFSE5CE
Manufacturer Part Number
EDE5116AFSE5CE
Description
BGA84
Manufacturer
Elpida Memory, Inc.
Datasheet
1.EDE5116AFSE5CE.pdf
(65 pages)
Specifications of EDE5116AFSE5CE
Date_code
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Description
The EDE5116AFSE is a 512M bits DDR2 SDRAM
organized as 8,388,608 words
It is packaged in 84-ball FBGA ( BGA
Document No. E0705E20 (Ver. 2.0)
Date Published July 2005 (K) Japan
Printed in Japan
URL: http://www.elpida.com
EDE5116AFSE (32M words 16 bits)
512M bits DDR2 SDRAM
16 bits
) package.
4 banks.
DATA SHEET
Features
Power supply: VDD, VDDQ
Double-data-rate architecture: two data transfers per
clock cycle
Bi-directional, differential data strobe (DQS and
/DQS) is transmitted/received with data, to be used in
capturing data at the receiver
DQS is edge aligned with data for READs: center-
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge: data
and data mask referenced to both edges of DQS
Four internal banks for concurrent operation
Data mask (DM) for write data
Burst lengths: 4, 8
/CAS Latency (CL): 3, 4, 5
Auto precharge operation for each burst access
Auto refresh and self refresh modes
Average refresh period
SSTL_18 compatible I/O
Posted CAS by programmable additive latency for
better command and data bus efficiency
Off-Chip-Driver Impedance Adjustment and On-Die-
Termination for better signal quality
/DQS can be disabled for single-ended Data Strobe
operation.
FBGA ( BGA) package with lead free solder
(Sn-Ag-Cu)
7.8 s at 0 C
3.9 s at 85 C
RoHS compliant
TC
TC
85 C
95 C
1.8V
Elpida Memory, Inc. 2005
0.1V
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