CY7C1021-10VC Cypress Semiconductor Corporation., CY7C1021-10VC Datasheet

CY7C1021-10VC

Manufacturer Part Number

CY7C1021-10VC

Description

Manufacturer

Cypress Semiconductor Corporation.

Datasheets

1.CY7C1021-10VC.pdf (9 pages)

2.CY7C1021-10VC.pdf (9 pages)

Specifications of CY7C1021-10VC

Case

SOJ

Date_code

06+

Current page: 1 of 9
Download datasheet (203Kb)

Cypress Semiconductor Corporation

Document #: 38-05054 Rev. **

Features

Functional Description

The CY7C1021 is a high-performance CMOS static RAM or-

ganized as 65,536 words by 16 bits. This device has an auto-

matic power-down feature that significantly reduces power

consumption when deselected.

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

Selection Guide

Logic Block Diagram

Maximum Access Time (ns)

Maximum Operating Current (mA)

Maximum CMOS Standby Current (mA)

Shaded areas contain preliminary information.

• High speed

• CMOS for optimum speed/power

• Low active power

• Automatic power-down when deselected

• Independent Control of Upper and Lower bits

• Available in 44-pin TSOP II and 400-mil SOJ

— t

— 1320 mW (max.)

= 12 ns

DATA IN DRIVERS

COLUMN DECODER

RAM Array

512 X 2048

64K x 16

•

Commercial

3901 North First Street

(BLE) is LOW, then data from I/O pins (I/O

written into the location specified on the address pins (A

through A

from I/O pins (I/O

specified on the address pins (A

Reading from the device is accomplished by taking Chip En-

able (CE) and Output Enable (OE) LOW while forcing the write

enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then

data from the memory location specified by the address pins

will appear on I/O

then data from memory will appear on I/O

truth table at the back of this data sheet for a complete descrip-

tion of read and write modes.

The input/output pins (I/O

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), the BHE and BLE

are disabled (BHE, BLE HIGH), or during a write operation (CE

LOW, and WE LOW).

The CY7C1021 is available in standard 44-pin TSOP Type II

and 400-mil-wide SOJ packages.

7C1021-10

220

0.5

•

I/O

BHE

BLE

San Jose

). If Byte High Enable (BHE) is LOW, then data

– I/O

7C1021-12

64K x 16 Static RAM

to I/O

through I/O

220

0.5

•

I/O

Pin Configuration

. If Byte High Enable (BHE) is LOW,

CA 95134

through I/O

SOJ / TSOP II

Top View

) is written into the location

7C1021-15

through A

Revised August 24, 2001

220

0.5

CY7C1021

•

BHE

BLE

I/O

) are placed in a

to I/O

1021-2

through I/O

408-943-2600

7C1021-20

. See the

220

0.5

), is

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