ICX285 SONY [Sony Corporation], ICX285 Datasheet - Page 13

• Manufacturer Part Number: ICX285
• Description: Timing Generator for Progressive Scan CCD Image Sensor
• Manufacturer: SONY [Sony Corporation]

Control by the SYNSL Pin
The CXD3607R sync system can be switched by the CXD3607R SYNSL pin (Pin 3).
Low: MCKO sync (Normally use with this system configuration.)
High: CKI sync
Control by the Serial Interface Data
The CXD3607R loads the serial interface data in the following format at the rising edge of the second SCK
clock after the rising edge of SEN.
In addition, the data are actually reflected at the following positions.
There are six categories of serial interface data: drive mode data, special drive data, logic phase adjustment
data, shutter data, TRIG data and other data. The details of the data for each category are described below.
Make sure that SCK does not stop even while SEN is high.
After reset is canceled, the serial data block is “XSHP, XSHD logic phase adjustment setting” D0 bit = 1 and
all other bits = 0.
Select this when sync signals VD and HD are generated by the MCKO output of the CXD3607R. The VD
and HD inputs are loaded to the CXD3607R at the rising edge of the MCKO pulse.
Select this when sync signals VD and HD are generated by the CKI input of the CXD3607R. The VD and
HD inputs are loaded to the CXD3607R at the rising edge of the CKI pulse, and the two MCKO logic
phases (a) and (b) existing after power-on can be aligned at the initial HD input by resetting the internal
clock.
CXD3607R
Data other than the following
2. Special drive data “SUB stop setting”
4. Shutter data “Shutter SUB setting”
5. TRIG data
6. Other data “Standby setting”
SCK
SEN
SSI
Low: MCKO sync
CKI
Sync signal
generator block
SD11
VD/HD
MCKO
SD10 SD9
CXD3607R
SD8
SD7
High: CKI sync
SD6
Reflected at the falling edge of the HD 8H after the falling
edge of VD.
Reflected at the falling edge of the HD 9H after the falling
edge of VD.
Reflected at the falling edge of the HD 9H after the falling
edge of VD.
Reflected at the falling edge of the HD 1H after the falling
edge of TRIG.
(Only when the TRIG function setting is 1: TRIG function
enabled)
Reflected at the rising edge of the second SCK clock after
the rising edge of SEN.
– 13 –
Sync signal
generator block
SD5
VD/HD
CKI
SD4
SD3
MCKO (a)
MCKO (b)
SD2
CKI
HD
High: MCKO reset for CKI sync
SD1
SD0
CXD3607R