HY5DU561622ETP-28 HYNIX [Hynix Semiconductor], HY5DU561622ETP-28 Datasheet - Page 17

• Manufacturer Part Number: HY5DU561622ETP-28
• Description: 256M(16Mx16) gDDR SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

Rev. 1.1 / Oct. 2005
MODE REGISTER SET (MRS)
The mode register is used to store the various operating modes such as /CAS latency, addressing mode, burst length,
burst type, test mode, DLL reset. The mode register is program via MRS command. This command is issued by the low
signals of /RAS, /CAS, /CS, /WE and BA0. This command can be issued only when all banks are in idle state and CKE
must be high at least one cycle before the Mode Register Set Command can be issued. Two cycles are required to write
the data in mode register. During the the MRS cycle, any command cannot be issued. Once mode register field is
determined, the information will be held until resetted by another MRS command.
BA1
0
BA0
0
1
BA0
0
A12
MRS Type
EMRS
MRS
A11
RFU
A10
A6
A9
0
0
0
0
1
1
1
1
A5
A8
0
0
1
1
0
0
1
1
DR
0
1
A8
A4
DLL Reset
0
1
0
1
0
1
0
1
TM
A7
A7
0
1
Yes
No
CAS Latency
Reserved
Reserved
Reserved
Reserved
Reserved
Test Mode
A6
Normal
Test
CAS Latency
3
4
5
A5
A4
A3
0
1
A3
BT
A2
0
0
0
0
1
1
1
1
A2
Burst Length
A1
0
0
1
1
0
0
1
1
Burst Type
Sequential
Interleave
A1
1HY5DU561622ETP
A0
0
1
0
1
0
1
0
1
A0
Sequential
Reserved
Reserved
Reserved
Reserved
Reserved
2
4
8
Burst Length
Interleave
Reserved
Reserved
Reserved
Reserved
Reserved
2
4
8
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