EM65100AGH EMC [ELAN Microelectronics Corp], EM65100AGH Datasheet - Page 17

• Manufacturer Part Number: EM65100AGH
• Description: 69 COM/ 101 SEG 4 Gray Level STN LCD Driver
• Manufacturer: EMC [ELAN Microelectronics Corp]

Data write operation
7.2 Data write to Display RAM and Control Register
The data write to display RAM and Control Register use almost same procedure, only different setting of RS that select
In the case of the 80-family MPU, the data is written at the rising edge of WRB. In the case of the 68-family MPU, the data
7.3 Internal Register Read
When serial interface is used, access is only made for 8-bit data transfer.
access object.
is written at the falling edge of signal E.
In the case of display RAM read operation, need dummy read one time. The designated address data are not output to read
operation immediately after the address set to AX or AY register, but are output when the second data read. Dummy read is
always required one time after address set and write cycle.
* This specification is subject to be changed without notice.
RS = “L”: Display RAM data
RS = “H”: Control register data
CSB
SDA
SCL
RS
W rie to which
D0~D7
W RB
RS
1
D7
D6
2
W rie to control register
Data0
D5
3
Figure 6. Data write operation
Figure 4. Serial Interface
69 COM/ 101 SEG 4 Gray Level STN LCD Driver
Data1
D4
4
D3
5
Data2
D2
6
Data3
7
D1
W rie to display RAM
valid
D0
8
Data4
2005/3/8 (V0.6)
EM65100
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