DS80C320+QCG Maxim Integrated, DS80C320+QCG Datasheet - Page 19

• Manufacturer Part Number: DS80C320+QCG
• Description: 8BIT CPU CMOS, SMD, 80C320, PLCC44; Series: DS80; Memory Size, RAM: 256Byte; No of I/O Lines: 32; Timers, No. of: 4; ...
• Manufacturer: Maxim Integrated

Figure 4. Ring Oscillator Startup
TIMED ACCESS PROTECTION
Selected SFR bits are critical to operation, making it desirable to protect against an accidental write
operation. The Timed Access procedure prevents an errant CPU from accidentally altering a bit that
would cause difficulty. The Timed Access procedure requires that the write of a protected bit be preceded
by the following instructions:
By writing an AAh followed by a 55h to the Timed Access register (location C7h), the hardware opens a
three-cycle window that allows software to modify one of the protected bits. If the instruction that seeks
to modify the protected bit is not immediately proceeded by these instructions, the write will not take
effect. The protected bits are:
MOV
MOV
EXIF.0
WDCON.6
WDCON.1
WDCON.0
WDCON.3
DIAGRAM ASSUMES THAT THE OPERATION FOLLOWING STOP REQUIRES LESS THAN 18ms COMPLETE.
0C7h, #0AAh
0C7h, #55h
BGS Bandgap Select
POR Power-on Reset flag
EWT Enable Watchdog
RWT Reset Watchdog
WDIF Watchdog Interrupt Flag
DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
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