IDT74SSTV16857PAG8 IDT, Integrated Device Technology Inc, IDT74SSTV16857PAG8 Datasheet - Page 5

• Manufacturer Part Number: IDT74SSTV16857PAG8
• Description: IC BUFFER 14BIT SSTL I/O 48TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 74SSTVr

Specifications of IDT74SSTV16857PAG8

• Logic Type: Registered Buffer with SSTL_2 Inputs and Outputs
• Supply Voltage: 2.3 V ~ 2.7 V
• Number Of Bits: 14
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Logic Family: SSTV
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Inputs: 14
• Number Of Outputs: 14
• High Level Output Current: -20mA
• Low Level Output Current: 20mA
• Propagation Delay Time: 2.8ns
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 220(Min)MHz
• Mounting: Surface Mount
• Pin Count: 48
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74SSTV16857PAG8

TIMING REQUIREMENTS OVER RECOMMENDED OPERATING FREE-AIR
TEMPERATURE RANGE
NOTES:
1. Data inputs must be low a minimum time of t
2. Data and clock inputs must be held at valid levels (not floating) a minimum time of t
3. For data signal input slew rate is ≥1V/ns.
4.
5. CLK, CLK signal input slew rates are ≥1V/ns.
NOTE:
1. 2.8ns for parts assembled and tested prior to WW14, 2004.
SWITCHING CHARACTERISTICS OVER RECOMMENDED FREE-AIR OPERATING
RANGE (UNLESS OTHERWISE NOTED)
IDT74SSTV16857
14-BIT REGISTERED BUFFER WITH SSTL I/O
Symbol
CLOCK
t
INACT
t
ACT
t
Symbol
tw
For data signal input slew rate is ≥0.5V/ns and <1V/ns.
SU
t
H
t
PDMSS
f
t
t
MAX
PDM
PHL
Parameter
Clock Frequency
Pulse Duration, CLK, CLK HIGH or LOW
Differential Inputs Active Time
Differential Inputs Inactive Time
Setup Time, Fast Slew Rate
Setup Time, Slow Slew Rate
Hold Time, Fast Slew Rate
Hold Time, Slow Slew Rate
Parameter
CLK and CLK to Q
CLK and CLK to Q (simultaneous switching)
RESET to Q
(3,5)
(2,5)
(3, 5)
(1)
(4, 5)
(2)
ACT
Data Before CLK↑, CLK↓
Data Before CLK↑, CLK ↓
max., after RESET is taken HIGH.
Min.
200
1.1
—
—
PC1600 - PC2700
5
Min.
0.65
0.75
0.75
INACT
2.5
0.9
—
—
—
PC1600 - PC2700
max., after RESET is taken LOW.
Max.
2.8
—
—
5
Max.
200
—
22
22
—
—
—
—
Min.
220
1.1
—
—
INDUSTRIAL TEMPERATURE RANGE
Min.
0.65
0.75
0.75
2.5
0.9
—
—
—
PC3200
PC3200
Max.
2.4
2.7
—
5
(1)
Max.
220
—
22
22
—
—
—
—
MHz
Unit
MHz
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns