MAX1281BCUP Maxim Integrated, MAX1281BCUP Datasheet - Page 20

• Manufacturer Part Number: MAX1281BCUP
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1281BCUP

• Number Of Channels: 8/4
• Architecture: SAR
• Conversion Rate: 300 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: 70 dB
• Interface Type: 4-Wire (SPI, Microwire, QSPI, TMS320)
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 559 mW
• Minimum Operating Temperature: 0 C
• Number Of Converters: 1
• Voltage Reference: 2.5 V

The MAX1280/MAX1281 can interface with QSPI using
the circuit in Figure 17 (f
CPHA = 0). This QSPI circuit can be programmed to do
a conversion on each of the eight channels. The result
is stored in memory without taxing the CPU, since QSPI
incorporates its own microsequencer.
Figure 18 shows an application circuit that interfaces
the MAX1280/MAX1281 to the TMS320 in external clock
mode. The timing diagram for this interface circuit is
shown in Figure 19.
Use the following steps to initiate a conversion in the
MAX1280/MAX1281 and to read the results:
1) The TMS320 should be configured with CLKX (trans-
Serial 12-Bit ADCs with Internal Reference
Table 5. Full Scale and Zero Scale
Figure 16. Power-Supply Grounding Connection
20
400ksps/300ksps, Single-Supply, Low-Power, 8-Channel,
R* = 10Ω
mit clock) as an active-high output clock and with
CLKR (TMS320 receive clock) as an active-high
input clock. CLKX and CLKR on the TMS320 are
High-Speed Digital Interfacing with QSPI
______________________________________________________________________________________
*OPTIONAL
V
V
DD1
V
DD1
REF
Full Scale
+ V
COM
MAX1280
MAX1281
GND
GND
UNIPOLAR MODE
TMS320LC3x Interface
SCLK
SUPPLIES
COM
= 4.0MHz, CPOL = 0,
V
DD2
Zero Scale
V
V
COM
DD2
DD
CIRCUITRY
DIGITAL
DGND
2) The MAX1280/MAX1281’s CS pin is driven low by
3) An 8-bit word (1XXXXX11) should be written to the
4) The MAX1280/MAX1281’s SSTRB output is moni-
5) The TMS320 reads in one data bit on each of the
6) Pull CS high to disable the MAX1280/MAX1281 until
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the endpoints of the transfer function,
once offset and gain errors have been nullified. The
static linearity parameters for the MAX1280/MAX1281
are measured using the endpoint method.
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees
no missing codes and a monotonic transfer function.
Aperture jitter (t
the time between the samples.
connected with the MAX1280/MAX1281’s SCLK
input.
the TMS320’s XF_ I/O port to enable data to be
clocked into the MAX1280/MAX1281’s DIN pin.
MAX1280/MAX1281 to initiate a conversion and
place the device into normal operating mode. See
Table 1 to select the proper XXXXX bit values for
your specific application.
tored through the TMS320’s FSR input. A falling
edge on the SSTRB output indicates that the conver-
sion is in progress and data is ready to be received
from the MAX1280/MAX1281.
next 16 rising edges of SCLK. These data bits repre-
sent the 12-bit conversion result followed by four
trailing bits, which should be ignored.
the next conversion is initiated.
Full Scale
V
+ V
Positive
REF
COM
/ 2
AJ
) is the sample-to-sample variation in
BIPOLAR MODE
V
Scale
Zero
Differential Nonlinearity
COM
Integral Nonlinearity
Aperture Jitter
Definitions
Full Scale
Negative
-V
+ V
REF
COM
/ 2