MAX1292ACEG Maxim Integrated, MAX1292ACEG Datasheet - Page 5

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MAX1292ACEG

Manufacturer Part Number
MAX1292ACEG
Description
Analog to Digital Converters - ADC Integrated Circuits (ICs)
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1292ACEG

Number Of Channels
4/2
Architecture
SAR
Conversion Rate
400 KSPs
Resolution
12 bit
Input Type
Single-Ended/Pseudo-Differential
Snr
Yes
Interface Type
Parallel
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Package / Case
QSOP-24
Maximum Power Dissipation
762 mW
Minimum Operating Temperature
0 C
Number Of Converters
1
Factory Pack Quantity
50
Voltage Reference
2.5 V
TIMING CHARACTERISTICS (continued)
(V
cycle), T
Figure 1. Load Circuits for Enable/Disable Times
Note 1: Tested at V
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after offset and gain errors have
Note 3: Offset nulled.
Note 4: On channel is grounded; sine wave applied to off channels.
Note 5: Conversion time is defined as the number of clock cycles times the clock period; clock has 50% duty cycle.
Note 6: Input voltage range referenced to negative input. The absolute range for the analog inputs is from GND to V
Note 7: External load should not change during conversion for specified accuracy.
Note 8: When bit 5 is set low for internal acquisition, WR must not return low until after the first falling clock edge of the conversion.
CS Rise to Output Disable
RD Rise to Output Disable
RD Fall to Output Data Valid
HBEN Rise to Output Data Valid
HBEN Fall to Output Data Valid
RD Fall to INT High Delay
CS Fall to Output Data Valid
DD
a) HIGH-Z TO V
DOUT
= V
A
LOGIC
3kΩ
been removed.
PARAMETER
= T
with +2.5V Reference and Parallel Interface
MIN
OH
= +5V ±10%, COM = GND, REFADJ = V
AND V
to T
OL
DD
_______________________________________________________________________________________
MAX
400ksps, +5V, 8-/4-Channel, 12-Bit ADCs
TO V
= +5V, COM = GND, = 0, unipolar single-ended input mode.
, unless otherwise noted. Typical values are at T
C
20pF
OH
LOAD
b) HIGH-Z TO V
SYMBOL
t
t
t
t
DOUT
t
INT1
DO1
DO1
DO2
t
t
DO
TC
TR
OL
V
C
C
C
C
C
C
C
LOGIC
AND V
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
3kΩ
C
20pF
LOAD
OH
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
= 20pF, Figure 1
TO V
DD
OL
, V
CONDITIONS
REF
= +2.5V, 4.7µF capacitor at REF pin, f
A
= +25°C.)
MIN
10
10
10
10
10
TYP
CLK
= 7.6MHz (50% duty
MAX
100
DD
60
40
50
50
80
50
.
UNITS
ns
ns
ns
ns
ns
ns
ns
5

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