STM32F372VCT6 STMicroelectronics, STM32F372VCT6 Datasheet - Page 91

• Manufacturer Part Number: STM32F372VCT6
• Description: ARM Microcontrollers - MCU 32-Bit ARM Cortex M4 72MHz 256kB MCU FPU
• Manufacturer: STMicroelectronics

Specifications of STM32F372VCT6

• Product Category: ARM Microcontrollers - MCU
• Rohs: yes
• Core: ARM Cortex M4F
• Processor Series: STM32F372xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 72 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.4 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-100
• Mounting Style: SMD/SMT
• A/d Bit Size: 16 bit
• A/d Channels Available: 1
• Interface Type: CAN, I2C, SPI, USART, USB
• Length: 14 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 84
• Number Of Timers: 2
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.4 V

STM32F37x
SPI/I
Unless otherwise specified, the parameters given in
are derived from tests performed under ambient temperature, f
supply voltage conditions summarized in
Refer to
function characteristics (NSS, SCK, MOSI, MISO for SPI and WS, CK, SD for I
Table 58.
1. Data based on characterization results, not tested in production.
2. Min time is for the minimum time to drive the output and the max time is for the maximum time to validate
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put
DuCy(SCK)
t
1/t
t
t
t
dis(SO)
t
w(SCKH)
t
w(SCKL)
t
a(SO)
the data.
the data in Hi-Z.
t
su(NSS)
Symbol
t
t
t
t
t
h(NSS)
t
su(MI)
f(SCK)
t
v(SO)
v(MO)
h(MO)
su(SI)
h(SO)
t
h(MI)
c(SCK)
h(SI)
r(SCK)
f
2
SCK
S characteristics
(1)(2)
(1)
(1)(3)
Section 6.3.14: I/O port characteristics
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SPI characteristics
SPI clock frequency
SPI clock rise and fall
time
SPI slave input clock
duty cycle
NSS setup time
NSS hold time
SCK high and low time
Data input setup time
Data input hold time
Data output access time Slave mode, f
Data output disable time Slave mode
Data output valid time
Data output valid time
Data output hold time
Parameter
Doc ID 022691 Rev 3
Master mode
Slave mode
Capacitive load: C = 30 pF
Slave mode
Slave mode
Slave mode
Master mode, f
presc = 4
Master mode
Slave mode
Master mode
Slave mode
Slave mode (after enable edge)
Master mode (after enable edge)
Slave mode (after enable edge)
Master mode (after enable edge)
Table
22.
for more details on the input/output alternate
Conditions
PCLK
PCLK
Table 58
= 24 MHz
= 36 MHz,
for SPI or in
PCLKx
Electrical characteristics
frequency and V
Tpclk/2
2Tpclk
4Tpclk
Min
5.5
6.5
30
- 3
15
5
5
0
0
4
Table 59
Tpclk/2
4Tpclk
2
Max
S).
+ 3
18
18
70
24
39
8
3
for I
DD
91/128
Unit
MHz
2
ns
ns
%
S