M95M01-DFMN6TP STMicroelectronics, M95M01-DFMN6TP Datasheet - Page 18

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M95M01-DFMN6TP

Manufacturer Part Number
M95M01-DFMN6TP
Description
EEPROM 1Mb SPI bus EEPROM 256kB 16MHz
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95M01-DFMN6TP

Rohs
yes

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
M95M01-DFMN6TP
Manufacturer:
ST
Quantity:
20 000
Instructions
6.2
18/45
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven high.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
Figure 9.
Power-up
WRDI instruction execution
WRSR instruction completion
WRITE instruction completion.
Figure
Write Disable (WRDI) sequence
S
C
D
Q
9, to send this instruction to the device, Chip Select (S) is driven low,
Doc ID 13264 Rev 11
High Impedance
0
1
2
Instruction
3
4
5
6
7
AI03750D
M95M01-DF M95M01-R

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