LCMXO2-4000ZE-1MG132C Lattice, LCMXO2-4000ZE-1MG132C Datasheet - Page 3

• Manufacturer Part Number: LCMXO2-4000ZE-1MG132C
• Description: FPGA - Field Programmable Gate Array 4320 LUTs 105 IO 1.2V 1 Spd
• Manufacturer: Lattice

Specifications of LCMXO2-4000ZE-1MG132C

• Rohs: yes
• Number Of Gates: 4 K
• Embedded Block Ram - Ebr: 92 Kbit
• Number Of I/os: 105
• Maximum Operating Frequency: 104 MHz
• Operating Supply Voltage: 1.14 V to 1.26 V, 1.14 V to 3.465 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: csBGA-132
• Distributed Ram: 34 Kbit
• Minimum Operating Temperature: 0 C
• Operating Supply Current: 124 uA
• Factory Pack Quantity: 360
• User Flash Memory - Ufm: 96 Kbit

INDEX
1.0 INTRODUCTION .................................................................................................................................................. 4
2.0 LATTICE PRODUCT QUALIFICATION PROGRAM .......................................................................................... 5
3.0 QUALIFICATION DATA MACHXO2 PRODUCT FAMILY ................................................................................ 10
4.0 PACKAGE QUALIFICATION DATA FOR MACHXO2 PRODUCT FAMILY .................................................... 21
5.0 MACHXO2 PROCESS RELIABILITY WAFER LEVEL REVIEW ..................................................................... 27
6.0 MACHXO2 SOFT ERROR RATE DATA ........................................................................................................... 28
7.0 MACHXO2 ADDITIONAL FAMILY DATA ......................................................................................................... 29
8.0 REVISION HISTORY ......................................................................................................................................... 30
3.1 M
3.2 M
3.3 M
3.4 M
4.1 M
4.2 M
4.3 M
4.4 M
4.5 M
Table 1.1 MachXO2 Product-Package
Figure 2.1: Lattice Standard Product Qualification Process Flow ............................................................................. 6
Table 2.2: Standard Qualification Testing ................................................................................................................. 8
Table 3.1.1: MachXO2 Product Family Life Results ................................................................................................ 10
Table 3.2.1: MachXO2 High Temperature Retention Results ................................................................................. 12
Table 3.3.1: MachXO2 Flash Extended Endurance Results ................................................................................... 13
Table 3.4.1 MachXO2 ESD-HBM Data ................................................................................................................... 14
Table 3.4.2 MachXO2 ESD-MM Data ..................................................................................................................... 16
Table 3.4.3 MachXO2 ESD-CDM Data ................................................................................................................... 17
Table 3.4.4 MachXO2 I/O Latch Up >100mA @ HOT (105°C) Data ....................................................................... 19
Table 3.4.5 MachXO2 Vcc Latch Up >1.5X @ HOT (105°C) Data ......................................................................... 20
Table 4.0 Product-Package Qualification-By-Extension Matrix ............................................................................... 21
Table 4.1.1 Surface Mount Precondition Data ......................................................................................................... 22
Table 4.2.1: Temperature Cycling Data ................................................................................................................... 23
Table 4.3.1: Unbiased HAST Data .......................................................................................................................... 24
Table 4.4.1: Biased HAST Data .............................................................................................................................. 25
Table 4.5.1: MachXO2 High Temperature Storage Life Results ............................................................................. 26
Table 5.1 – Wafer Level Reliability (WLR) Results .................................................................................................. 27
Table 6.1 - MachXO2 MEASURED FITs / Mb ......................................................................................................... 28
Table 7.1: MachXO2 Package Assembly Data – BGA & TQFP ............................................................................ 29
Table 8.1: MachXO2 Product Family Qualification Summary revisions .................................................................. 30
ACH
ACH
ACH
ACH
ACH
ACH
ACH
ACH
ACH
XO2 P
XO2 P
XO2 P
XO2 P
XO2 P
XO2 P
XO2 P
XO2 P
XO2 P
RODUCT
RODUCT
RODUCT
RODUCT
RODUCT
RODUCT
RODUCT
RODUCT
RODUCT
F
F
F
F
F
F
F
F
F
AMILY
AMILY
AMILY
AMILY
AMILY
AMILY
AMILY
AMILY
AMILY
L
H
F
– ESD
S
T
U
THB: B
H
IFE
LASH
EMPERATURE
URFACE
IGH
NBIASED
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T
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EMPERATURE
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EMPERATURE
AND
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M
HAST D
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OUNT
THIS TABLE AND RED TEXT ON THIS PAGE WILL BE DELETEDError! Bookmark
ATCH
HAST D
ATA
C
YCLING
P
UP D
RECONDITIONING
ATA
...................................................................................................... 10
C
R
S
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TORAGE
ETENTION
ATA
................................................................................................ 24
ATA
D
3
ATA
........................................................................................... 25
........................................................................................ 14
D
...................................................................................... 23
L
ATA
IFE
(HTRX) D
.............................................................................. 13
(HTSL) ................................................................. 26
T
ESTING
ATA
Lattice Semiconductor Corporation Doc. #25-106923 Rev. F
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