KSZ8842-16MVL TR Micrel, KSZ8842-16MVL TR Datasheet - Page 36

• Manufacturer Part Number: KSZ8842-16MVL TR
• Description: Ethernet ICs 2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) bus interface(Lead Free)
• Manufacturer: Micrel

Specifications of KSZ8842-16MVL TR

• Rohs: yes
• Product: Ethernet Switches
• Package / Case: PQFP-128
• Mounting Style: SMD/SMT

To avoid jabber and excessive deference (as defined in the 802.3 standard), after a certain time, the KSZ8842M
discontinues the carrier sense and then raises it again quickly. This short silent time (no carrier sense) prevents other
stations from sending out packets thus keeping other stations in a carrier sense deferred state. If the port has packets to
send during a backpressure situation, the carrier sense type backpressure is interrupted and those packets are
transmitted instead. If there are no additional packets to send, carrier sense type backpressure is reactivated again until
switch resources free up. If a collision occurs, the binary exponential back-off algorithm is skipped and carrier sense is
generated immediately, thus reducing the chance of further collisions and carrier sense is maintained to prevent packet
reception.
To ensure no packet loss in 10 BASE-T or 100 BASE-TX half-duplex modes, the user must enable the following:
Note: These bits are not set in default, since this is not the IEEE standard.
Broadcast Storm Protection
The KSZ8842M has an intelligent option to protect the switch system from receiving too many broadcast packets. As the
broadcast packets are forwarded to all ports except the source port, an excessive number of switch resources (bandwidth
and available space in transmit queues) may be utilized. The KSZ8842M has the option to include “multicast packets” for
storm control. The broadcast storm rate parameters are programmed globally, and can be enabled or disabled on a per
port basis in P1CR1[7] and P2CR1[7]. The rate is based on a 67ms interval for 100BT and a 670ms interval for 10BT. At
the beginning of each interval, the counter is cleared to zero and the rate limit mechanism starts to count the number of
bytes during the interval. The rate definition is described in SGCR3[2:0][15:8]. The default setting is 0x63 (99 decimal).
This is equal to a rate of 1%, calculated as follows:
Note: 148,800 frames/sec is based on 64-byte block of packets in 100BASE-T with 12 bytes of IPG and 8 bytes of
preamble between two packets.
Repeater Mode
When the KSZ8842M is set to repeater mode (SGCR3[7] = 1), it only works on 100BT half-duplex mode. In repeater
enabled mode, all ingress packets will be broadcast to the other two ports without MAC address checking and learning.
Before setting to the repeater mode, the user has to set bit 13 (100Mbps), bit 12 (auto-negotiation disabled) and bit 8 (half
duplex) in both P1MBCR and P2MBCR registers as well as set bit 6 (host half duplex) in SGCR3 register for the repeater
mode.
The latency in repeater mode is defined from the 1st bit of DA into the ingress port 1 to the 1st bit of DA out of the egress
port 2. The minimum is 270 ns and the maximum is 310 ns (one clock skew of 25 MHz between TX and RX).
Clock Generator
The X1 and X2 pins are connected to a 25 MHz crystal. X1 can also serve as the connector to a 3.3V, 25 MHz oscillator
(as described in the pin description).
The bus interface unit (BIU) uses BCLK (Bus Clock) for synchronous accesses. The maximum host port frequency is 50
MHz for VLBus-like and burst mode (32-bit interface only).
Bus Interface Unit (BIU)
The host interface of the BIU is designed to communicate with embedded processors. The host interface of the
KSZ8842M is a generic bus interface. Some glue logic may be required when the interface talks to various buses and
processors.
In terms of transfer type, the BIU can support two transfers: asynchronous transfer and synchronous transfer. To support
these transfers (asynchronous and synchronous), the BIU provides three groups of signals:
Since both synchronous and asynchronous signals are independent of each other, synchronous burst transfer and
asynchronous transfer can be mixed or interleaved but cannot be overlapped (due to the sharing of the common signals).
In terms of physical data bus size, the KSZ8842M supports 8, 16, and 32 bit host/industrial standard data bus sizes.
Given a physical data bus size, the KSZ8842M supports 8, 16, or 32-bit data transfers depending on the size of the
Micrel, Inc.
October 2007
1. Aggressive back off (bit 8 in SGCR1)
2. No excessive collision drop (bit 3 in SGCR2)
1. Synchronous signals
2. Asynchronous signals
3. Common signals are used for both synchronous and asynchronous transfers.
148,800 frames/sec X 67 ms/interval X 1% = 99 frames/interval (approx.) = 0x63
36
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9