MAX7325ATG Maxim Integrated, MAX7325ATG Datasheet - Page 11

• Manufacturer Part Number: MAX7325ATG
• Description: Interface - I/O Expanders
• Manufacturer: Maxim Integrated
• Series: MAX7325r

Specifications of MAX7325ATG

• Maximum Operating Frequency: 400 KHz
• Operating Supply Voltage: 1.71 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: TQFN-24 EP
• Power Dissipation: 761.9 mW

The acknowledge bit is a clocked 9th bit the recipient
uses to acknowledge receipt of each byte of data
(Figure 4). Each byte transferred effectively requires 9
bits. The master generates the 9th clock pulse, and the
recipient pulls down SDA during the acknowledge
clock pulse, such that the SDA line is stable low during
the high period of the clock pulse. When the master is
transmitting to the MAX7325, the device generates the
acknowledge bit because the MAX7325 is the recipi-
ent. When the MAX7325 is transmitting to the master,
the master generates the acknowledge bit because the
master is the recipient.
Each MAX7325 has two different 7-bit slave addresses
(Tables 2 and 3). The addresses are different to communi-
cate to either the eight push-pull outputs or the eight I/Os.
The 8th bit of the slave address following the 7-bit slave
address is the R/W bit. It is low for a write command, and
high for a read command (Figure 5). The first (A6), sec-
ond (A5), and third (A4) bits of the MAX7325 slave
Figure 4. Acknowledge
Figure 5. Slave Address
Maxim Integrated
TRANSMITTER
RECEIVER
SDA
SCL
SDA BY
SDA BY
SCL
CONDITION
START
S
MSB
1
A5
2
FOR ACKNOWLEDGEMENT
I
2
A4
C Port Expander with 8 Push-Pull
CLOCK PULSE
Slave Address
8
Acknowledge
A3
9
A2
address are always 1, 1, and 0 (P0–P7) or 1, 0, and 1
(O8 to O15). Connect AD0 and AD2 to GND, V
or SCL to select the slave address bits A3, A2, A1, and
A0. The MAX7325 has 16 possible pairs of slave
addresses (Tables 2 and 3), allowing up to 16
MAX7325 devices on an I
The MAX7325 is accessed though an I
MAX7325 has two different 7-bit slave addresses for
either the eight open-drain I/O ports (P0–P7) or the
eight push-pull ports (O8–O15). See Tables 2 and 3.
A single-byte read from the I/O ports (P0–P7) of the
MAX7325 returns the status of the eight I/O ports and
clears both the internal transition flags and the INT out-
put when the master acknowledges the slave address
byte. A single-byte read from the eight push-pull ports
(O8–O15) returns the status of the eight output ports,
read back as inputs.
A 2-byte read from the I/O ports (P0–P7) of the
MAX7325 returns the status of the eight I/O ports (as for
a single-byte read), followed by the transition flags.
Again, the internal transition flags and the INT output
are cleared when the master acknowledges the slave
address byte, yet the previous transition flag data is
sent as the second byte. A 2-byte read from the push-
pull ports of the MAX7325 repeatedly returns the status
of the eight output ports, read back as inputs.
A multibyte read (more than 2 bytes before the I
STOP bit) from the I/O ports (P0–P7) of the MAX7325
repeatedly returns the port data, followed by the transi-
tion flags. As the port data is resampled for each trans-
mission, and the transition flags are reset each time, a
multibyte read continuously returns the current data
and identifies any changing input ports.
and 8 Open-Drain I/Os
A1
LSB
A0
2
C bus.
Accessing the MAX7325
R/W
MAX7325
2
C interface. The
ACK
+,
SDA,
2
11
C