ASI4UC-G1-SR-7 ZMDI, ASI4UC-G1-SR-7 Datasheet - Page 36

• Manufacturer Part Number: ASI4UC-G1-SR-7
• Description: Interface - Specialized ASI
• Manufacturer: ZMDI

Specifications of ASI4UC-G1-SR-7

• Product Category: Interface - Specialized
• Rohs: yes
• Product Type: Actuator Sensor Interface IC
• Operating Supply Voltage: 16 V to 33.1 V
• Supply Current: 6 mA
• Maximum Power Dissipation: 850 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Minimum Operating Temperature: - 25 C

Any IC reset or the reception of a Delete_Address call turns the Data Output Register to 0xF and forces the
data output drivers to high impedance state. Simultaneously a Data Strobe is generated, having the same
t
generation of a slave response to Data_Exchange (DEXG) requests depend on the value of
Data_Exchange_Disable flag. It becomes set during IC reset or after a Delete_Address call prohibiting any
data port activity after IC initialization or address assignment, as long as the external circuitry was not pre-
conditioned by dedicated parameter output data. The Data_Exchange_Disable flag is cleared while
processing a Write_Parameter (WPAR) request. Consequently the AS-i master has to send a WPAR call in
advance of the first Data_Exchange (DEXG) request in order to enable Data Port operation at the slave.
3.7.2.
Besides the standard input function the Data Port offers different data pre-processing features that can be
activated by setting corresponding flags in the Firmware Area of the E²PROM. The data path is structured as
follows:
Joint Input Inverting
Data Sheet
January 30, 2012
setup


Input
Signal
Filter
Output
ASI4U / ASI4U-E
Spec. 3.0 Com
The input values of all four data input channels are inverted when the Invert_Data_In flag is set. Any
configurations made in the DI_Invert_Configuration register are ignored. The feature is kept for
compatibility with A²SI product versions.
Selective Input Inverting
If the Invert_Data_In flag is not set, inverting of input data can be configured individually for every
Data Port input channel by setting the corresponding flag in the DI_Invert_Configuration register. Hereby
the index of the DI channel corresponds to the bit position within the register. Thus, the data at input
channel DI0 is inverted if Bit 0 of the DI_Invert_Configuration register is set and consequently input
channel DI3 is inverted if Bit 3 is set.
Selective Input Filtering
A digital anti-bouncing filter is provided at every Data Input channel to keep undesired signal bouncing at
the DI pins away from the AS-i Master. If activated, a signal transition at the particular DI pin is passed to
the Data Input Register only if the new value has remained constant for a certain time.
timing and t
Input Data Pre-Processing
Configurable
Input Inverter
Start Filter Timer
Filter Timer active
© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
DSR
pliant Universal AS-I IC
pulse width, as new output data would be driven. All Data Port operations as well as the
Figure 12: Principle of input filtering
Configurable
Input Filter
Figure 11: Input path at Data Port
Reset Filter Timer
Filter Timer expired
Data Input
Controller
Register
Data I/O
+
Transmitter
AS-i
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