MAX8753ETI-T Maxim Integrated, MAX8753ETI-T Datasheet - Page 12

• Manufacturer Part Number: MAX8753ETI-T
• Description: LCD Drivers
• Manufacturer: Maxim Integrated

TFT LCD DC-DC Converter with
Integrated Charge Pumps
Figure 3. Step-Up Regulator Block Diagram
slope compensation signal is summed with the current-
sense and feedback signals.
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET and
applying the input voltage across the inductor. The cur-
rent through the inductor ramps up linearly, storing
energy in its magnetic field. Once the sum of the cur-
rent-feedback signal and the slope compensation
exceed the COMP voltage, the controller resets the flip-
flop, and turns off the MOSFET. Since the inductor cur-
rent is continuous, a transverse potential develops
across the inductor (L1) that turns on the diode (D1).
The voltage across the inductor then becomes the dif-
ference between the output voltage and the input volt-
age. This discharge condition forces the current
through the inductor to ramp back down, transferring
the energy stored in the magnetic field to the output
capacitor and the load. The MOSFET remains off for the
rest of the clock cycle.
12
C
REF
______________________________________________________________________________________
REF
GND
REF
OSC
MAX8753
1.1V
OSC
SLOPE
COMP
REF-OK
V
IN
= 2.6V TO 5.5V
BUFFER
CSN
CSP
EAN
EAP
SC
EA
IN
The positive charge-pump regulator is typically used to
generate the positive supply rail for the TFT LCD gate-
driver ICs (Figure 4). The output voltage is set with an
external resistive voltage-divider from its output to GND
with the midpoint connected to FBP. The positive
charge pump is a voltage tripler that accepts an input
voltage up to +13V and delivers a 20mA output up to
+28V without external switches or diodes.
During the first half-cycle (CLK is low), C1N pin is con-
nected to the ground, which allows V
the first flying capacitor C1 through diode D1. The
amount of charge transferred from V
determined by the on-resistance of N1, which varies
according to the output of the feedback error amplifier.
During the second half-cycle (CLK is high), C1N is con-
nected to V
volts. The on-resistance of P1 is also controlled by the
output of the feedback error amplifier. Meanwhile,
CLKB becomes low, pulling C2N to the ground. This
connects C1 in parallel with the second flying capacitor
DC-DC
LOGIC
L1
SUPP
CS
Gm
Positive Charge-Pump Regulator
DRV
through P1, level shifting C1 by V
REF
PGND
INTG
FB
LX
SUPP
R1
R2
D1 V
SUPP
MAIN
C
to charge up
R
INTG
COMP
(UP TO 13V)
to C1 is
C
MAIN1
SUPP
C
COMP