MAX8753ETI-T Maxim Integrated, MAX8753ETI-T Datasheet - Page 9

• Manufacturer Part Number: MAX8753ETI-T
• Description: LCD Drivers
• Manufacturer: Maxim Integrated

2, 12, 20,
16, 17
PIN
23
10
11
13
14
15
18
19
21
22
24
25
26
27
28
1
3
4
5
6
7
8
9
LCDON
NAME
PGND
SHDN
OUTP
SUPN
SUPP
OUTL
INTG
GND
N.C.
C2N
C1N
C2P
FBP
REF
FBN
C3P
DLP
C1P
FBL
I.C.
FB
LX
IN
_______________________________________________________________________________________
Positive Charge-Pump Supply Voltage. Bypass to PGND with a 0.1µF capacitor.
No connection. Not internally connected.
Negative Terminal of Flying Capacitor C2
Positive Terminal of Flying Capacitor C2
Positive Charge-Pump Output
Step-Up Regulator Integrator Output. Connect a 470pF capacitor from INTG to GND.
Step-Up Converter Feedback Input. Regulates to 1.245V (nominal). Connect a resistor-divider from the
output (V
Positive Charge-Pump Feedback Input. Regulates to 1.25V (nominal). Connect a resistor-divider from the
output (OUTP) to FBP to analog ground (GND). Place the resistor-divider within 5mm of FBP.
Logic Linear Regulator Dual-Mode Feedback Input. Connect FBL to GND to select the 2.5V preset linear
regulator output voltage (OUTL). Connect FBL to the center tap of a resistive voltage-divider between
OUTL and GND to set an adjustable output voltage. In adjustable mode, FBL is regulated at 1.25V nominal.
Place the resistive divider within 5mm of FBL.
Logic Linear Regulator Output. Output of the 2.5V or adjustable linear regulator. Bypass to GND with a
10µF (min) capacitor.
Supply Input. +2.6V to +5.5V input range. Supply input for the IC and input for the internal logic linear
regulator. Bypass to GND with a 0.1µF capacitor within 5mm of the IC pins.
Analog Ground. Connect to power ground (PGND) underneath the IC.
Internal Reference Output. Bypass REF to GND with a 0.22µF (min) capacitor. REF can supply up to 50µA
to an external load.
Negative Charge-Pump Feedback Input. Connect a resistor-divider from the output (OUTN) to FBN to the
reference output (REF). Place the resistor-divider within 5mm of FBN.
Internally Connected. Make no connection to this pin.
Positive Terminal of Flying Capacitor C3
Negative Charge-Pump Supply Voltage. Bypass to PGND with a 0.1µF capacitor.
Power MOSFET n-Channel Drain and Switching Node. Connect the inductor and catch diode to LX and
minimize the trace area for lowest EMI.
Power Ground. PGND is the source of the main boost/n-channel power MOSFET. Connect PGND to the
output capacitor ground terminals through a short, wide PC board trace.
Positive Charge-Pump Startup Delay Input. Connect a capacitor from DLP to GND to set the delay time. A
5µA current source charges C
Active-Low Shutdown Control Input. All outputs are disabled when SHDN is low. When SHDN is high, REF
and OUTL are enabled and the LCD supplies can be enabled if LCDON is high.
LCD Supply Enable Input. All LCD supply outputs (MAIN, OUTN, and OUTP) are disabled when LCDON is
low. REF and OUTL are unaffected by LCDON.
Negative Terminal of Flying Capacitor C1
Positive Terminal of Flying Capacitor C1
MAIN
) to FB to analog ground (GND). Place the resistor-divider within 5mm of FB.
TFT LCD DC-DC Converter with
DLP
. DLP is pulled to GND by a 20Ω switch when shut down.
Integrated Charge Pumps
FUNCTION
Pin Description
9