MAX8753ETI-T Maxim Integrated, MAX8753ETI-T Datasheet - Page 18

• Manufacturer Part Number: MAX8753ETI-T
• Description: LCD Drivers
• Manufacturer: Maxim Integrated

TFT LCD DC-DC Converter with
Integrated Charge Pumps
An IC’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment and the ambient temperature. The thermal resis-
tance depends on the IC package, PC board copper
area, other thermal mass, and airflow.
The MAX8753, with its exposed backside paddle sol-
dered to 1in
1.7W into +70°C still air. More PC board copper, cooler
ambient air, and more airflow increase the possible dissi-
pation while less copper or warmer air decreases the
IC’s dissipation capability. The major components of
power dissipation are the power dissipated in the step-
up regulator, the linear regulator, and the charge pumps.
The largest portions of power dissipation in the step-up
regulator are the internal MOSFET, inductor, and the
output diode. If the step-up regulator has 90% efficien-
cy, approximately 3% to 5% of the power is lost in the
internal MOSFET, approximately 3% to 4% in the induc-
tor, and approximately 1% in the output diode. The
remaining 1% to 3% is distributed among the input and
output capacitors and the PC board traces. If the input
power is approximately 5W, the power lost in the inter-
nal MOSFET is approximately 150mW to 250mW.
The power dissipation in the linear regulator is:
The power dissipation in the positive charge-pump reg-
ulator is:
The power dissipation in the negative charge-pump
regulator is:
18
______________________________________________________________________________________
P
P
D NEG
P
D LOGIC
D POS
(
(
2
(
of PC board copper, can dissipate about
Applications Information
)
)
=
)
=
(
Negative Charge-Pump Regulator
=
n
(
Positive Charge-Pump Regulator
3
NEG
(
V
×
IN
V
MAIN
−
x V
V
SUPN
LOGIC
−
Power Dissipation
V
POS
+
)
Step-Up Regulator
×
V
Linear Regulator
I
NEG
LOGIC
)
×
I
POS
)
×
I
NEG
Careful PC board layout is important for proper opera-
tion. Use the following guidelines for good PC board
layout:
1) Minimize the area of the step-up regulator’s high-
2) Create a power-ground island (PGND) consisting of
3) Place the feedback voltage-divider resistors as close
4) Place the IN and OUTL bypass capacitors as close
current loops by placing the inductor (L1), output
diode (D1), and output capacitor (C
input capacitor (C
pins. The high-current input loop goes from the posi-
tive terminal of C
PGND, and to C
rent output loop is from the positive terminal of C
to L1, to the output diode (D1), to the positive termi-
nal of C
capacitor and input capacitor ground terminals.
Connect these loop components with short, wide
connections. Avoid using vias in the high-current
paths. If vias are unavoidable, use many vias in par-
allel to reduce resistance and inductance.
the input and output capacitor grounds, PGND pin,
the charge-pump input capacitors, output capaci-
tors, and diodes. Connect these together with short,
wide traces or a small ground plane. Maximizing the
width of the power-ground traces improves efficien-
cy and reduces output-voltage ripple and noise
spikes. Create an analog-ground plane (AGND)
consisting of the GND pin, all the feedback-divider
ground connections, the INTG and DEL capacitor
ground connections, and the device’s exposed
backside pad. Connect the AGND and PGND
islands by connecting the PGND pin directly to the
exposed backside pad. Make no other connections
between these separate ground planes.
to the feedback pin as possible. The divider’s center
trace should be kept short. Placing the resistors far
away causes the FB traces to become antennas that
can pick up switching noise. Care should be taken to
avoid running any feedback trace near LX or the
switching nodes in the charge pumps.
to the device as possible. The ground connections
of the IN and OUTL bypass capacitors should be
connected directly to the PGND plane near the
PGND pin with a wide trace.
MAIN
PC Board Layout and Grounding
, reconnecting between the output
IN
IN
’s negative terminal. The high-cur-
IN
to L
) and near the LX and PGND
1
, to the IC’s LX pin, out of
MAIN
) near the
IN