BR24L16F-WE2 Rohm Semiconductor, BR24L16F-WE2 Datasheet - Page 28

IC EEPROM 16KBIT 400KHZ 8SOP

BR24L16F-WE2

Manufacturer Part Number
BR24L16F-WE2
Description
IC EEPROM 16KBIT 400KHZ 8SOP
Manufacturer
Rohm Semiconductor
Datasheet

Specifications of BR24L16F-WE2

Memory Size
16K (2K x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOP
Clock Frequency
400kHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Memory Configuration
2K X 8
Interface Type
I2C, Serial
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
BR24L16F-WE2TR

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●I/O peripheral circuit
○ Pull up resistance of SDA terminal
○ Maximum value of R
○ Minimum value of R
○ Pull up resistance of SCL terminal
●A0, A1, A2, WP process
○ Process of device address terminals (A0,A1,A2)
○ Process of WP terminal
SDA is NMOS open drain, so requires pull up resistance. As for this resistance value (R
from microcontroller V
consumption current at action.
The maximum value of R
(1)SDA rise time to be determined by the capacitance (CBUS) of bus line of R
(2)The bus electric potential A to be determined by input leak total (I
The minimum value of R
(1)When IC outputs LOW, it should be satisfied that V
(2)V
When SCL control is made at CMOS output port, there is no need, but in the case there is timing where SCL becomes 'Hi-Z', add a pull up
resistance. As for the pull up resistance, one of several k Ω ~ several ten k Ω is recommended in consideration of drive performance of output
port of microcontroller.
Check whether the set device address coincides with device address input sent from the master side or not, and select one among plural
devices connected to a same bus. Connect this terminal to pull up or pull down, or Vcc or GND. And, pins(Don't use PIN) not used as device
address may be set to any of 'H' , 'L', and 'Hi-Z'.
WP terminal is the terminal that prohibits and permits write in hardware manner. In 'H' status, only READ is available and WRITE of all address
is prohibited. In the case of 'L', both are available. In the case of use it as an ROM, it is recommended to connect it to pull up or Vcc. In the case
to use both READ and WRITE, control WP terminal or connect it to pull down or GND.
from(2)
And AC timing should be satisfied even when SDA rise time is late.
sufficiently secure the input 'H' level (V
Ex.) When Vcc= 3V, V
OLMAX
from(1),
E x .) When Vcc = 3V, I
Vcc - I
And
R
=0.4V should secure the input 'L' level (V
PU
Types with Don't use PIN
R
PU
L
V
R
V
R
CC
PU
0.8×3-0.7×3
300 [kΩ]
OLMAX
PU
PU
R
PU
-V
Therefore, the condition (2) is satisfied.
IL
- 0.2Vcc ≧ V
PU
10×10
, I
PU
0.8V
PU
L
≦ V
R
OL
, and V
OL
is determined by the following factors.
PU
is determined by the following factors.
0.4V, I
V
-6
CC
IL
CC
L
I
-0.1 Vcc
=10µA, V
L
V
≧ 867 [Ω]
I
-V
I
V
OL
OL
OL
-V
OL
OL
IL
-I
=0.4 [ V ]
=0.3 × 3
=3mA, microcontroller, EEPROM V
OL
=0.9 [ V ]
IH
OL
3-0.4
IH
3×10
characteristics of this IC. If R
IH
IH
) of microcontroller and EEPROM including recommended noise margin 0.2Vcc.
= 0.7Vcc,
-3
BR24S16/F/FJ/FV/FVT/FVM/FVJ/NUX-W
IL
) of microcontroller and EEPROM including recommended noise margin 0.1Vcc.
OLMAX
=0.4V and I
28/32
PU
L
OLMAX
) of device connected to bus output of 'H' to SDA bus and R
is large, action frequency is limited. The smaller the R
IL
=0.3Vcc
Microcontroller
=3mA.
PU
マイコン
and SDA should be tR or below.
PU
), select an appropriate value to this resistance value
Fig.49 I/O circuit diagram
IL
A0, A1, A2
R
PU
Bus line
capacity
CBUS
A
IL
BR24SXX
SDA terminal
PU
, the larger the
PU
should

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