71321LA45J IDT, 71321LA45J Datasheet - Page 11

• Manufacturer Part Number: 71321LA45J
• Description: SRAM
• Manufacturer: IDT
• Series: IDT71321LAr
• Type: Asyncronous Static RAMr

Specifications of 71321LA45J

• Memory Size: 16 kbit
• Organization: 2 K x 8
• Access Time: 45 ns
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-52
• Memory Type: CMOS
• Part # Aliases: IDT71321LA45J

NOTES:
1. Port-to-port delay through RAM cells from the writing port to the reading port, refer to “Timing Waveform of Write with Port-to-Port Read and BUSY."
2. To ensure that the earlier of the two ports wins.
3. t
4. To ensure that a write cycle is inhibited on port "B" during contention on port "A".
5. To ensure that a write cycle is completed on port "B" after contention on port "A".
6. 'X' in part numbers indicates power rating (SA or LA)..
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage Range
BUSY TIMING (For MASTER 71321)
t
t
t
t
t
t
t
t
t
BUSY INPUT TIMING (For SLAVE 71421)
t
t
t
t
BUSY TIMING (For MASTER 71321)
t
t
t
t
t
t
t
t
t
BUSY INPUT TIMING (For SLAVE 71421)
t
t
t
t
BAA
BDA
BAC
BDC
WH
WDD
DDD
APS
BDD
WB
WH
WDD
DDD
BAA
BDA
BAC
BDC
WH
WDD
DDD
APS
BDD
WB
WH
WDD
DDD
IDT71321SA/LA and IDT71421SA/LA
High Speed 2K x 8 Dual-Port Static RAM with Interrupts
Symbol
Symbol
BDD
is a calculated parameter and is the greater of 0, t
BUSY Access Time from Address
BUSY Disable Time from Address
BUSY Access Time from Chip Enable
BUSY Disable Time from Chip Enable
Write Hold After BUSY
Write Pulse to Data Delay
Write Data Valid to Read Data Delay
Arbitration Priority Set-up Time
BUSY Disable to Valid Data
Write to BUSY Input
Write Hold After BUSY
Write Pulse to Data Delay
Write Data Valid to Read Data Delay
BUSY Access Time from Address
BUSY Disable Time from Address
BUSY Access Time from Chip Enable
BUSY Disable Time from Chip Enable
Write Hold After BUSY
Write Pulse to Data Delay
Write Data Valid to Read Data Delay
Arbitration Priority Set-up Time
BUSY Disable to Valid Data
Write to BUSY Input
Write Hold After BUSY
Write Pulse to Data Delay
Write Data Valid to Read Data Delay
(4)
(4)
(5)
(5)
(5)
(5)
(1)
(1)
(1)
(1)
(3)
(3)
(2)
(2)
(1)
(1)
(1)
(1)
WDD
Parameter
Parameter
– t
WP
(actual) or t
DDD
6.42
11
– t
DW
(actual).
Industrial and Commercial Temperature Ranges
(6)
Min.
Min.
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
12
12
20
20
5
0
5
0
Com'l Only
Com'l Only
71321X20
71421X20
71321X35
71421X35
Max.
Max.
____
____
____
____
____
____
____
____
20
20
20
20
50
35
25
40
30
20
20
20
20
60
35
35
60
35
Min.
Min.
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
____
15
15
20
20
5
0
5
0
71321X25
71421X25
71321X55
71421X55
Com'l
Com'l
& Ind
& Ind
Max.
Max.
____
____
____
____
____
____
____
____
20
20
20
20
50
35
35
50
35
30
30
30
30
80
55
50
80
55
2691 tbl 10a
2691 tbl 10b
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns