71V2556S150PFGI IDT, 71V2556S150PFGI Datasheet - Page 3

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71V2556S150PFGI

Manufacturer Part Number
71V2556S150PFGI
Description
SRAM
Manufacturer
IDT
Datasheet

Specifications of 71V2556S150PFGI

Rohs
yes
Part # Aliases
IDT71V2556S150PFGI
Functional Block Diagram
NOTES:
1. V
2. V
Recommended DC Operating
Conditions
IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
y S
V
V
V
V
V
V
m
D
IL
IH
D
S
D
H I
H I
L I
b
D
S
Q
(min.) = –1.0V for pulse width less than t
l o
(max.) = +6.0V for pulse width less than t
o C
I
u S
I
I
I
O /
p n
p n
p n
Address A [0:16]
e r
p p
t u
t u
t u
u S
CE1, CE2, CE2
y l
i H
i H
o L
u S
p p
h g
h g
o V
w
p p
a P
y l
o V
a t l
o V
o V
y l
a r
o V
e g
a t l
m
o V
a t l
a t l
a t l
ADV/LD
e g
e
e g
e g
a t l
e g
r e t
(optional)
Clock
TRST
e g
- O /
I -
BWx
CEN
TMS
I
LBO
R/W
TCK
p n
TDI
OE
s t u
0 -
3
2
M
1 .
3 .
1
1
3 .
0
. n i
7 .
7 .
5 3
5 7
) 1 (
CYC
CYC
(SA Version)
D
D
D
/2, once per cycle.
y T
/2, once per cycle.
3
2
_ _
_ _
_ _
JTAG
Clk
0
3 .
5 .
_ _
_ _
_ _
. p
Q
Q
Q
V
V
D
D
D
3
2
M
Q
D
4 .
6 .
0
0
. x a
0 +
7 .
0 +
5 6
5 2
3 .
3 .
) 2 (
8 4
TDO
5 7
U
l b t
V
V
V
V
V
V
t i n
3 0
6.42
3
Control Logic
Gate
Address
Control
MEMORY ARRAY
Data I/O [0:31],
128Kx36 BIT
Output Register
Commercial and Industrial Temperature Ranges
I/O P[1:4]
DI
Mux
D
Q
DO
Sel
4875 drw 01a
,

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