71V2556S150PFGI IDT, 71V2556S150PFGI Datasheet - Page 6

• Manufacturer Part Number: 71V2556S150PFGI
• Description: SRAM
• Manufacturer: IDT

Specifications of 71V2556S150PFGI

• Rohs: yes
• Part # Aliases: IDT71V2556S150PFGI

Pin Configuration — 128K x 36, 119 BGA
NOTES:
1. J3, J5, and R5 do not have to be directly connected to V
2. G4 and A4 are reserved for future 8M and 16M respectively.
3. These pins are NC for the "S" version and the JTAG signal listed for the "SA" version.
4. TRST is offered as an optional JTAG reset if required in the application. If not needed, can be left floating and will internally be pulled to V
5. Pin T7 supports ZZ (sleep mode) on the latest die revision.
IDT71V2556, 128K x 36, 3.3V Synchronous ZBT™ SRAMs
with 2.5V I/O, Burst Counter, and Pipelined Outputs
M
C
D
G
H
N
U
A
B
E
K
P
R
F
L
T
J
V
V
V
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
NC
NC
DDQ
DDQ
DDQ
DDQ
DDQ
NC
1
16
17
20
22
24
25
29
31
NC/TMS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CE
V
NC
A
A
A
2
DD
P3
P4
6
7
18
19
21
23
26
27
28
30
5
2
(3)
NC/TDI
BW
BW
LBO
V
V
V
V
V
V
V
V
V
A
A
A
A
DD
3
SS
SS
SS
SS
DD(1)
SS
SS
SS
SS
10
4
3
2
4
3
as long as the input voltage is ≥ V
(3)
Top View
NC/TCK
ADV/LD
NC(2)
NC(2)
CEN
CLK
V
V
V
R/W
A
NC
NC
CE
OE
A
A
4
DD
DD
DD
11
6.42
1
0
1
6
(3)
NC/TDO
BW
BW
V
V
V
V
V
V
V
V
V
A
A
A
A
V
5
SS
SS
SS
SS
SS
SS
SS
SS
12
DD(1)
14
8
9
DD(1)
1
2
(3)
IH
.
Commercial and Industrial Temperature Ranges
NC/TRST
I/O
I/O
I/O
I/O
I/O
CE
V
A
A
I/O
I/O
I/O
I/O
I/O
A
NC
6
DD
16
15
13
P2
13
12
11
P1
2
9
6
4
3
2
(3,4)
NC/ZZ
V
V
V
V
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4875 drw 13a
NC
NC
I/O
NC
DDQ
DDQ
DDQ
DDQ
DDQ
7
15
14
10
8
7
5
1
0
(5)
,
DD.