IDT71V632S8PFG IDT, Integrated Device Technology Inc, IDT71V632S8PFG Datasheet
IDT71V632S8PFG
Specifications of IDT71V632S8PFG
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IDT71V632S8PFG Summary of contents
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... Features 64K x 32 memory configuration ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ Supports high system speed: Commercial: – A4 4.5ns clock access time (117 MHz) Commercial and Industrial: – 5 5ns clock access time (100 MHz) – 6 6ns clock access time (83 MHz) – ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Pin Definitions ( ...
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... Write Register Byte 3 Write Register Byte 4 Write Register Q D Enable Register CLK Enable Delay Register 6.42 3 INTERNAL ADDRESS 64K BIT MEMORY ARRAY – Byte 1 Write Driver 8 Byte 2 Write Driver 8 Byte 3 Write Driver 8 Byte 4 Write Driver 8 OUTPUT REGISTER DATA INPUT REGISTER OE OUTPUT ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Absolute Maximum Ratings ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Pin Configuration 100 I I DDQ V 5 ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Synchronous Truth Table ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Synchronous Write Function Truth Table ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect AC Electrical Characteristics ( 3.3V +10/-5%, Commercial and Industrial Temperature Ranges) DD, DDQ ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Timing Waveform of Pipelined Read Cycle Commercial and Industrial Temperature Ranges (1,2) 6.42 10 ...
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CLK (2) ADSP ADDRESS GW ADV OE DATA IN t DATA OUT Single Read NOTES: 1. Device is selected through entire cycle; CE and CS are LOW ...
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CYC CLK ADSP ADSC ADDRESS Ax BWE is ignored when ADSP initiates burs CE (Note 3) ADV OE DATA I1(Ax ...
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CLK ADSP ADSC ADDRESS Ax BWE is ignored when ADSP initiates burs BWE BWx is ignored when ADSP initiates burs BWx CE (Note 3) ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Timing Waveform of Sleep (ZZ) and Power-Down Modes Commercial and Industrial Temperature Ranges (1,2,3) 6.42 14 ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Non-Burst Read Cycle Timing Waveform CLK ADSP ADSC ADDRESS Av GW, BWE, BWx CE DATA OUT NOTES input is ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Non-Burst Write Cycle Timing Waveform CLK ADSP ADSC ADDRESS DATA IN NOTES input is LOW, ADV and ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect 100-pin Thin Quad Plastic Flatpack (TQFP) Package Diagram Outline Commercial and Industrial Temperature Ranges 6.42 17 ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Ordering Information 71V632 Device Power Speed Package Type PART NUMBER SPEED IN MEGAHERTZ 71V632SA4PF 71V632S5PF 71V632S6PF 71V632S7PF X X Process/ Tempera- ture ...
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IDT71V632, 64K x 32, 3.3V Synchronous SRAM with Pipelined Outputs and Single Cycle Deselect Datasheet Document History 9/9/99 Pg Pg. 15, 16 Pg. 18 09/30/99 Pg 04/04/00 Pg. 17 08/09/00 08/17/01 ...