MT48LC8M8A2P-75 IT:G Micron Technology Inc, MT48LC8M8A2P-75 IT:G Datasheet - Page 69

• Manufacturer Part Number: MT48LC8M8A2P-75 IT:G
• Description: IC SDRAM 64MBIT 133MHZ 54TSOP
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC8M8A2P-75 IT:G

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (8M x 8)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-TSOP II
• Organization: 8Mx8
• Density: 64Mb
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 140mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 52:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
DQML, DQMH
A0–A9, A11
COMMAND
BA0, BA1
DQM /
CKE
CLK
A10
DQ
WRITE – Full-Page Burst
t CMS
t CKS
Notes:
t AS
t AS
t AS
ACTIVE
BANK
ROW
ROW
T0
t CKH
t CMH
t AH
t AH
t AH
t RCD
1. x16: A8, A9 and A11 = “Don’t Care”
2.
3. Page left open; no
t CL
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
t
WR must be satisfied prior to PRECHARGE command.
T1
NOP
t CH
t CMS
t CK
COLUMN m 1
t DS
D
T2
WRITE
BANK
IN
t CMH
t DH
m
t
RP.
t DS
D
IN
T3
NOP
m + 1
t DH
69
1,024 (x4) locations within same row
256 (x16) locations within same row
512 (x8) locations within same row
t DS
D
IN
T4
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Full page completed
t DS
D
IN
T5
NOP
m + 3
t DH
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
(
(
)
)
)
)
)
(
)
(
(
(
(
(
(
)
(
)
)
(
)
(
)
(
)
(
)
(
)
)
)
(
(
(
)
)
)
)
)
(
)
(
)
(
)
)
)
)
64Mb: x4, x8, x16 SDRAM
t DS
Tn + 1
D
IN
NOP
m - 1
t DH
Full-page burst does
not self-terminate. Can
use BURST TERMINATE
command to stop.
©2000 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t DS
BURST TERM
Tn + 2
t DH
2, 3
DON’T CARE
Tn + 3
NOP