MT48LC16M8A2P-75 IT:G TR Micron Technology Inc, MT48LC16M8A2P-75 IT:G TR Datasheet - Page 62

IC SDRAM 128MBIT 133MHZ 54TSOP

MT48LC16M8A2P-75 IT:G TR

Manufacturer Part Number
MT48LC16M8A2P-75 IT:G TR
Description
IC SDRAM 128MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT48LC16M8A2P-75 IT:G TR

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (16M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 46:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
A0–A9, A11
COMMAND
BA0, BA1
DQM /
CLK
A10
CKE
DQ
t CMS
t CKS
t AS
t AS
t AS
Alternating Bank Read Accesses
ACTIVE
BANK 0
T0
ROW
ROW
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD - BANK 0
t RAS - BANK 0
t
t
RC - BANK 0
RRD
t CK
T1
1. For this example, BL = 4, and CL = 2.
2. x16: A9 and A11 = “Don’t Care.”
NOP
x8: A11 = “Don’t Care.”
ENABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
BANK 0
T2
READ
t CMH
t CH
CAS Latency - BANK 0
T3
NOP
t LZ
t AC
62
BANK 3
ACTIVE
T4
ROW
ROW
D
OUT
t OH
t AC
m
t RCD - BANK 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
m + 1
t OH
t AC
ENABLE AUTO PRECHARGE
COLUMN b 2
BANK 3
D
T6
OUT
128Mb: x4, x8, x16 SDRAM
READ
m + 2
t OH
t AC
CAS Latency - BANK 3
©1999 Micron Technology, Inc. All rights reserved.
t RP - BANK 0
D
T7
NOP
OUT
Timing Diagrams
m + 3
t OH
t AC
BANK 0
T8
ACTIVE
ROW
ROW
DON’T CARE
UNDEFINED
D
OUT
t RCD - BANK 0
t OH
t AC
b

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