M25PX32-VMP6E NUMONYX, M25PX32-VMP6E Datasheet - Page 34

IC FLASH 32MBIT 75MHZ 8VFQFPN

M25PX32-VMP6E

Manufacturer Part Number
M25PX32-VMP6E
Description
IC FLASH 32MBIT 75MHZ 8VFQFPN
Manufacturer
NUMONYX
Series
Forté™r
Datasheet

Specifications of M25PX32-VMP6E

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (4M x 8)
Speed
75MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-VFQFN, 8-VFQFPN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M25PX32-VMP6E
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
M25PX32-VMP6E
Manufacturer:
ST
0
6.7
34/68
Read Data Bytes at higher speed (FAST_READ)
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Data Bytes at higher speed (FAST_READ) instruction is followed by a 3-byte address (A23-
A0) and a dummy byte, each bit being latched-in during the rising edge of Serial Clock (C).
Then the memory contents, at that address, are shifted out on Serial Data output (DQ1) at a
maximum frequency f
The instruction sequence is shown in
The first byte addressed can be at any location. The address is automatically incremented
to the next higher address after each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes at higher speed (FAST_READ) instruction.
When the highest address is reached, the address counter rolls over to 000000h, allowing
the read sequence to be continued indefinitely.
The Read Data Bytes at higher speed (FAST_READ) instruction is terminated by driving
Chip Select (S) High. Chip Select (S) can be driven High at any time during data output. Any
Read Data Bytes at higher speed (FAST_READ) instruction, while an Erase, Program or
Write cycle is in progress, is rejected without having any effects on the cycle that is in
progress.
Figure 15. Read Data Bytes at higher speed (FAST_READ) instruction sequence
1. Address bits A23 to A22 are Don’t care.
DQ0
DQ1
S
C
DQ0
DQ1
S
C
and data-out sequence
0
7
32 33 34
6
1
High Impedance
Dummy byte
5
2
C
Instruction
, during the falling edge of Serial Clock (C).
3
4
35
4
3
36 37 38 39 40 41 42 43 44 45 46
2
5
6
1
7
0
MSB
23
7
8
Figure
22 21
6
9 10
24-bit address
DATA OUT 1
5
15.
4
3
28 29 30 31
3
2
2
1
1
0
0
47
MSB
7
6
DATA OUT 2
5
4
3
2
1
0
MSB
AI13737
7

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