CY7C09279V-6AXC Cypress Semiconductor Corp, CY7C09279V-6AXC Datasheet - Page 10

• Manufacturer Part Number: CY7C09279V-6AXC
• Description: IC SRAM 512KBIT 6.5NS 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C09279V-6AXC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 512K (32K x 16)
• Speed: 6.5ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Density: 512Kb
• Access Time (max): 15ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 53MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 15b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 320mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 16b
• Number Of Words: 32K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Notes
Document #: 38-06056 Rev. *C
27. Output state (High, LOW, or high impedance) is determined by the previous cycle control signals.
28. CE
29. During “No Operation”, data in memory at the selected address may be corrupted and must be rewritten to ensure data integrity.
ADDRESS
ADDRESS
DATA
DATA
0
DATA
DATA
and ADS = V
CLK
R/W
CE
CE
CLK
R/W
OUT
CE
CE
OUT
OE
IN
IN
0
1
0
1
t
t
t
t
t
t
SW
SW
SC
SA
SC
SA
IL
; CE
1
, CNTEN, and CNTRST = V
A
A
n
n
t
t
Figure 10. Pipelined Read-to-Write-to-Read (OE Controlled)
CH2
CH2
t
t
Figure 9. Pipelined Read-to-Write-to-Read (OE = V
CYC2
t
CYC2
t
(continued)
t
t
t
t
HW
HW
HC
HA
HC
HA
t
t
CL2
CL2
A
A
READ
READ
n+1
n+1
t
t
CD2
IH
CD2
.
t
Q
SW
t
OHZ
n
Q
n
t
SW
t
SD
D
A
A
n+2
n+2
n+2
t
t
HW
CKHZ
t
NO OPERATION
HD
t
HW
t
WRITE
SD
A
D
A
D
n+3
n+2
n+2
n+3
t
HD
WRITE
IL
)
[20, 27, 28, 29]
[20, 27, 28, 29]
CY7C09269V/79V/89V
CY7C09369V/79V/89V
A
A
n+3
n+4
t
CKLZ
t
CKLZ
READ
READ
A
A
n+4
n+5
t
t
CD2
CD2
Page 10 of 19
Q
n+4
Q
n+3
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