DS2704G+T&R Maxim Integrated Products, DS2704G+T&R Datasheet - Page 5

• Manufacturer Part Number: DS2704G+T&R
• Description: IC EEPROM 1.25KBIT 6TDFN
• Manufacturer: Maxim Integrated Products

Specifications of DS2704G+T&R

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 1.25K (32B x 5 pages)
• Interface: 1-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 6-TDFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

DS2704: 1280-Bit EEPROM with SHA-1 Authentication
In SHA-1 computation mode, the supply current increases to I
for a period of t
. The computation mode load
DD2
SHA
current occurs after the last bit of one of the Compute MAC function commands is sent.
Programming mode is entered when writing the nonvolatile memory portions of the DS2704. The supply current
increases to I
for t
when a Copy Scratchpad, Write Status, Compute Secret, Clear/Lock Secret or Clear/Set
DDP
EEC
Overdrive Timing command is executed.
Functional compatibility has been maintained between the DS2502 and DS2704 at the Net Address/ROM
Command and Function Command levels for reading the Memory and Status data fields. Since the DS2704 is
based on EEPROM technology versus the EPROM technology used for the DS2502, writing of the Memory and
Status data fields is not the same as the DS2502. The DS2704 includes an on-chip charge pump to facilitate in-
circuit programming. The need to apply an external high voltage programming pulse during pack manufacture is
therefore eliminated. Data can be written to a 0 or 1 value up to N
times in the DS2704. The ability to reprogram
EEC
the data in the EEPROM pages makes the Page Address Redirection bytes in the Status data field unnecessary.
Therefore, the DS2704 maintains them for DS2502 read compatibility but they cannot be modified from their factory
default values of FFh.
AUTHENTICATION
Authentication is performed using a FIPS-180 compliant SHA-1 one way hash algorithm on a 512-bit message
block. The message block consists of a 64-bit secret, a 64-bit challenge and 384 bits of constant data. Optionally,
the 64-bit Net Address replaces 64 of the 384 bits of constant data used in the hash operation. Contact
Dallas/Maxim for details of the message block organization.
The host and the DS2704 both calculate the result based on the mutually known secret. The result data, known as
the Message Authentication Code (MAC) or Message Digest, is returned by the DS2704 for comparison to the
host’s result. Note that the secret is never transmitted on the bus and thus cannot be captured by observing bus
traffic. Each authentication attempt is initiated by the host system by providing a 64-bit random challenge via the
Write Challenge command. The host then issues the Compute MAC or Compute MAC with ROM ID command. The
MAC is computed per FIPS 180, and then returned as a 160-bit serial stream, beginning with the least significant
bit.
DS2704 AUTHENTICATION COMMANDS
WRITE CHALLENGE [0Ch]. This command writes the 64-bit challenge to the DS2704. The LSB of the 64-bit data
argument can begin immediately after the MSB of the command has been completed. If more than 8 bytes are
written, the final value in the challenge register will be indeterminate. The Write Challenge command must be
issued prior to every Compute MAC or Compute Next Secret command for reliable results.
COMPUTE MAC WITHOUT ROM ID [36h]. This command initiates a SHA-1 computation based on the Challenge
Value and Internal Secret. Logical 1’s are loaded in place of the ROM ID. This command allows the use of a master
secret and MAC response independent of the ROM ID. The DS2704 computes the MAC in t
after receiving the
SHA
last bit of this command. After the MAC computation is complete, the host must write 8 write zero time slots and
then issue 160 read time slots to receive the 20-byte MAC. See Figure 7 on page 18 for command timing.
COMPUTE MAC WITH ROM ID [35h]. This command is structured the same as the Compute MAC without ROM
ID, except that the ROM ID is included in the message block. With the ROM ID unique to each DS2704 included in
the MAC computation, use of a unique secret in each token and a master secret in the host device is allowed. See
application note “White Paper 4”, available at http://www.maxim-ic.com, for more information. See Figure 7 on page
18 for command timing.
NOTE: Immediately after power-up, a dummy Compute MAC command is required to initialize the DS2704. If the
dummy command is not issued, the first authentication attempt is computed using a challenge value of 0. When
issuing the dummy Compute MAC command, the command sequence can be terminated immediately following the
th
8
bit of the Compute MAC command byte. Waiting for the SHA-1 computation and reading the results back are
not required.
SHA-1 related commands used while authenticating a battery or peripheral device are summarized in Table 1 for
convenience. Four additional commands for clearing, computing and locking of the Secret are described in detail in
the following section.
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