AT49BV802AT-70TU SL383 Atmel, AT49BV802AT-70TU SL383 Datasheet - Page 4

• Manufacturer Part Number: AT49BV802AT-70TU SL383
• Description: IC FLASH 8MBIT 70NS 48TSOP
• Manufacturer: Atmel

Specifications of AT49BV802AT-70TU SL383

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8 or 512K x 16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 2.65 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3. Block Diagram
4. Device Operation
4.1
4.2
4
Read
Command Sequences
AT49BV802A(T)
The AT49BV802A(T) is accessed like an EPROM. When CE and OE are low and WE is high,
the data stored at the memory location determined by the address pins are asserted on the out-
puts. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line
control gives designers flexibility in preventing bus contention.
When the device is first powered on, it will be reset to the read or standby mode, depending
upon the state of the control line inputs. In order to perform other device functions, a series of
command sequences are entered into the device. The command sequences are shown in the
“Command Definition Table” on page 13
codes). The command sequences are written by applying a low pulse on the WE or CE input
with CE or WE low (respectively) and OE high. The address is latched on the falling edge of CE
or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. Standard
microprocessor write timings are used. The address locations used in the command sequences
are not affected by entering the command sequences.
A0 - A18
Y-DECODER
X-DECODER
ADDRESS
BUFFER
LATCH
INPUT
OUTPUT
BUFFER
COMPARATOR
I/O0 - I/O15/A-1
MEMORY
IDENTIFIER
REGISTER
REGISTER
Y-GATING
STATUS
MAIN
DATA
(I/O8 - I/O15 are don’t care inputs for the command
BUFFER
INPUT
WRITE STATE
COMMAND
REGISTER
MACHINE
PROGRAM/ERASE
VOLTAGE SWITCH
3405E–FLASH–2/07
CE
WE
OE
RESET
BYTE
RDY/BUSY
VCC
GND