AT49BV802AT-70TU SL383 Atmel, AT49BV802AT-70TU SL383 Datasheet - Page 8

IC FLASH 8MBIT 70NS 48TSOP

AT49BV802AT-70TU SL383

Manufacturer Part Number
AT49BV802AT-70TU SL383
Description
IC FLASH 8MBIT 70NS 48TSOP
Manufacturer
Atmel
Datasheet

Specifications of AT49BV802AT-70TU SL383

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
8M (1M x 8 or 512K x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4.9
4.10
4.11
4.12
8
Program Suspend/Program Resume
Product Identification
128-bit Protection Register
RDY/BUSY
AT49BV802A(T)
The Program Suspend command allows the system to interrupt a programming operation and
then read data from a different byte/word within the memory. After the Program Suspend com-
mand is given, the device requires a maximum of 20 µs to suspend the programming operation.
After the programming operation has been suspended, the system can then read data from any
other byte/word that is not contained in the sector in which the programming operation was sus-
pended. An address is not required during the program suspend operation. To resume the
programming operation, the system must write the Program Resume command. The program
suspend and resume are one-bus cycle commands. The command sequence for the erase sus-
pend and program suspend are the same, and the command sequence for the erase resume
and program resume are the same.
The product identification mode identifies the device and manufacturer as Atmel. It may be
accessed by hardware or software operation. The hardware operation mode can be used by an
external programmer to identify the correct programming algorithm for the Atmel product.
For details, see
Identification Entry/Exit” sections on
for both modes.
The AT49BV802A(T) contains a 128-bit register that can be used for security purposes in sys-
tem design. The protection register is divided into two 64-bit blocks. The two blocks are
designated as block A and block B. The data in block A is non-changeable and is programmed
at the factory with a unique number. The data in block B is programmed by the user and can be
locked out such that data in the block cannot be reprogrammed. To program block B in the pro-
tection register, the four-bus cycle Program Protection Register command must be used as
shown in the
Lock Protection Register command must be used as shown in the
Data bit D1 must be zero during the fourth bus cycle. All other data bits during the fourth bus
cycle are don’t cares. To determine whether block B is locked out, the status of Block B Protec-
tion command is given. If data bit D1 is zero, block B is locked. If data bit D1 is one, block B can
be reprogrammed. Please see the
address locations in the protection register. To read the protection register, the Product ID Entry
command is given followed by a normal read operation from an address within the protection
register. After determining whether block B is protected or not, or reading the protection register,
the Product ID Exit command must be given prior to performing any other operation.
An open-drain READY/BUSY output pin provides another method of detecting the end of a pro-
gram or erase operation. RDY/BUSY is actively pulled low during the internal program and erase
cycles and is released at the completion of the cycle. The open-drain connection allows for OR-
tying of several devices to the same RDY/BUSY line. Please see
for more details.
“Command Definition Table” on page
“Operating Modes” on page 17
“Protection Register Addressing Table” on page 14
page
24. The manufacturer and device codes are the same
(for hardware operation) or “Software Product
13. To lock out block B, the four-bus cycle
“Status Bit Table” on page 12
“Command Definition
3405E–FLASH–2/07
Table”.
for the

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