RC28F256K3C120 NUMONYX, RC28F256K3C120 Datasheet - Page 56

• Manufacturer Part Number: RC28F256K3C120
• Description: IC FLASH 256MBIT 120NS 64BGA
• Manufacturer: NUMONYX

Specifications of RC28F256K3C120

• Rohs Status: RoHS non-compliant
• Format - Memory: FLASH
• Memory Type: StrataFlash® FLASH
• Memory Size: 256M (16Mx16)
• Speed: 120ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-BGA
• Other names: 853157

28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
14.0
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Table 20. Status Register Description (Sheet 1 of 2)
Special Modes
This section describes in details how to read the status, ID and CFI registers. This sections also
details how to configure the STS signal.
Read Status Register
The status of the device can be determined by reading the Status Register. To read the Status
Register, issue the Read Status Register command. Status Register data is automatically made
available following a Word Program, Block Erase, or Block Lock command sequence. Subsequent
reads from the device after any of these command sequences will output that the device’s status
until another valid command is written to the device (e.g. Read Array).
The Status Register is read using single asynchronous- and single synchronous-reads only; page- or
burst-mode reads cannot be used to read the Status Register. Status Register data is output on
D[7:0], while 0x00 is output on D[15:8]. The falling edge of OE# or CE# (which ever occurs first)
updates and latches the Status Register contents. The Ready bit (SR7) provides overall status of the
device. Status register bits SR[6:1] present status and error information about the Program, Erase,
Suspend, V
Care should be taken to avoid Status Register ambiguity when issuing valid 2-cycle commands
during Erase Suspend. If a command sequence error occurs during an erase-suspend state, the
Status Register will contain the command sequence error status (SR[7,5:4] set). When the erase
operation resumes and finishes, possible errors during the erase operation cannot be detected via
the Status Register because it will contain the previous error status. To avoid this situation, always
clear the Status Register prior to resuming erase operations.
Status Register (SR)
Ready
RDY
Bit
7
7
6
5
4
3
PEN
Ready (RDY)
Erase Suspend (ES)
Erase Error (EE)
Program Error (PE)
V
PEN
Suspend
, and Block-Locked operation.
Erase
ES
Error (VE)
6
Name
Erase Error
EE
5
0 = Device is busy; program or erase cycle in progress; SR[0] valid.
1 = Device is ready; SR[6:1] are valid.
0 = Erase suspend not in effect.
1 = Erase suspend in effect.
0 = Erase successful.
1 = Erase fail or Program Sequence Error when set with SR[7,4].
0 = Program successful.
1 = Program fail or Program Sequence Error when set with SR[7,5]
0 = VPEN within acceptable limits during program or erase operation.
1 = VPEN < VPENLK during program or erase operation.
Program
Error
PE
4
VPEN
VE
3
Program
Suspend
Description
PS
2
Locked
Block-
Error
LE
1
Default Value =0x80
Buffered-EFP
Datasheet
Status
PS
0