CY7C1263V18-375BZXC Cypress Semiconductor Corp, CY7C1263V18-375BZXC Datasheet - Page 7

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CY7C1263V18-375BZXC

Manufacturer Part Number
CY7C1263V18-375BZXC
Description
IC SRAM 36MBIT 375MHZ 165TFBGA
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1263V18-375BZXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous, QDR II
Memory Size
36M (4M x 8)
Speed
375MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
165-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1263V18-375BZXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Pin Definitions
Document Number: 001-06366 Rev. *E
CQ
CQ
ZQ
DOFF
TDO
TCK
TDI
TMS
NC
NC/72M
NC /144M
NC /288M
V
V
V
V
REF
DD
SS
DDQ
Pin Name
Power Supply Power Supply Inputs to the Core of the Device.
Power Supply Power Supply Inputs for the Outputs of the Device.
Echo Clock
Echo Clock
Reference
Ground
Output
Input-
Input
Input
Input
Input
Input
N/A
N/A
N/A
N/A
(continued)
IO
Synchronous Echo Clock Outputs. This is a free running clock and is synchronized to the
input clock (K) of the QDR-II+. The timing for the echo clocks is shown in
istics on page
Synchronous Echo Clock Outputs. This is a free running clock and is synchronized to the
input clock (K) of the QDR-II+. The timing for the echo clocks is shown in
istics on page
Output Impedance Matching Input. This input is used to tune the device outputs to the system
data bus impedance. CQ, CQ, and Q
resistor connected between ZQ and ground. Alternatively, this pin can be connected directly to
V
GND or left unconnected.
DLL Turn Off, Active LOW. Connecting this pin to ground turns off the DLL inside the device.
The timing in the DLL turned off operation is different from that listed in this data sheet. For
normal operation, this pin can be connected to a pull up through a 10 Kohm or less pull up
resistor. The device behaves in QDR-I mode when the DLL is turned off. In this mode, the device
can be operated at a frequency of up to 167 MHz with QDR-I timing.
TDO for JTAG.
TCK Pin for JTAG.
TDI Pin for JTAG.
TMS Pin for JTAG.
Not Connected to the Die. Can be tied to any voltage level.
Not Connected to the Die. Can be tied to any voltage level.
Not Connected to the Die. Can be tied to any voltage level.
Not Connected to the Die. Can be tied to any voltage level.
Reference Voltage Input. Static input used to set the reference level for HSTL inputs, outputs,
and AC measurement points.
Ground for the Device.
DDQ
, which enables the minimum impedance mode. This pin cannot be connected directly to
24.
24.
[x:0]
Pin Description
output impedance are set to 0.2 x RQ, where RQ is a
CY7C1261V18, CY7C1276V18
CY7C1263V18, CY7C1265V18
Switching Character-
Switching Character-
Page 7 of 29
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